The authors would like to thank L. Ding and M. Boccard for their contributions in processing and testing of the solar cells in this study. The authors acknowledge funding from the U.S. Department of Energy under contract DE-EE0006335 and the Engineering Research Center Program of the National Science Foundation and the Office of Energy Efficiency and Renewable Energy of the Department of Energy under NSF Cooperative Agreement No. EEC-1041895.&#160;Som Dahal at Solar Power Lab was supported, in part, by NSF contract ECCS-1542160.

CAUTION: Please consult all relevant material safety data sheets (MSDS) before dealing with chemicals. Please use all appropriate safety practices when performing a solar cell fabrication including the fume hood and personal protective equipment (safety glasses, gloves, lab coat, full-length pants, closed-toe shoes).
1. Si Wafer Cleaning
<ol>
	<li>Clean Si wafers in Piranha solution (H2O2/H2SO4) at 110 &#176;C.
	<ol>
		<li>To produce Piranha solution, fill the acid bath (high-density polyethylene tank and hereafter) with 15.14 L of H2SO4 (96%) and then 1.8 L of H2O2 (30%).</li>
		<li>Wait for the temperature of the solution to stabilize at 110 &#176;C.</li>
		<li>Place 4-inch-diameter, float-zone (FZ), n-type, and double-side-polished Si wafers in a clean 4&#8221; wafer cassette (polypropylene and hereafter), and place the boat in the Piranha bath for 10 min.</li>
		<li>Rinse for 10 min with deionized (DI) water.</li>
	</ol>
	</li>
	<li>Clean Si wafers with RCA cleaning solution at 74 &#176;C.
	<ol>
		<li>Prepare a diluted solution of HCl:H2O2. Fill the acid bath with 13.2 L of DI H2O and 2.2 L of HCl. Spike the solution with 2.2 L of H2O2 and turn on the heater.</li>
		<li>Wait for the temperature of the solution to stabilize at 74 &#176;C before use.</li>
		<li>Put Si wafers in a clean 4&#8221; wafer cassette and place wafers in the RCA solution for 10 min.</li>
		<li>Rinse with DI water for 10 min.</li>
	</ol>
	</li>
	<li>Clean Si wafers in Buffered Oxide Etch (BOE) solution.
	<ol>
		<li>Pour 15.14 L of BOE solution in the acid bath.</li>
		<li>Place the 4&#8221; wafer cassette in the bath for 3 min.</li>
		<li>Rinse for 10 min with DI water.</li>
		<li>Dry the wafer by dry N2.</li>
	</ol>
	</li>
</ol>
2. P-diffusion in the Diffusion Furnace
<ol>
	<li>Put a cleaned wafer in a diffusion quartz boat.</li>
	<li>Load it into a quartz tube that has a base temperature of 800 &#176;C. Ramp the furnace temperature to 820 &#176;C in the N2 environment. At 820 &#176;C, start flowing the N2 carrier gas that bubbles through phosphorous oxychloride (POCl3) at 1000 sccm. After 15 min, turn off the N2 carrier gas and ramp the temperature down to 800 &#176;C before taking the samples out.</li>
	<li>Place the samples in a BOE solution for 10 min to remove phosphorus silicate glass (PSG) and then perform a 10-min rinse in DI water.</li>
</ol>
3. SiNx coating by PECVD
<ol>
	<li>Put the wafer in a clean boat and dip it in a BOE bath for 1 min to remove the native oxide on the surface.</li>
	<li>Rinse for 10 min with DI water.</li>
	<li>Dry the wafer with a dry N2 gun.</li>
	<li>Place the Si wafer on a clean Si carrier (156 mm monocrystalline Si).</li>
	<li>Load the sample into the plasma enhanced chemical vapor deposition (PECVD) chamber.</li>
	<li>Deposit 150 nm-thick (38.5 s) SiNx at 350 &#176;C in the chamber. Deposit SiNx at 300 W RF power with a base pressure of 3.5 Torr and 60 sccm of SiH4 as a silicon source and 60 sccm of NH3 as a N source (2000 sccm of N2 was used as a diluent).
	<ol>
		<li>Confirm the growth rate of SiNx (3.9 nm/s) by depositing SiNx films with different deposition times on polished wafers and measure the thicknesses by variable angle spectroscopic ellipsometry (VASE).</li>
	</ol>
	</li>
</ol>
4. GaP Growth by MBE
<ol>
	<li>After SiNx deposition, load the wafer into the MBE chamber.</li>
	<li>Outgas in the introductory chamber (180 &#176;C for 3 h), then outgas in the buffer chamber (240 &#176;C for 2 h). Load in to the growth chamber and bake at 850 &#176;C for 10 min.</li>
	<li>Decrease temperature to 580 &#176;C. Increase Ga effusion cell temperature to produce ~2.71&#215;10-7 Torr beam-equivalent pressure (BEP) and Si effusion cell temperature to 1250 &#176;C.</li>
	<li>Adjust the p-valved cracker positioner to achieve ~1.16&#215;10-6 Torr BEP. Open the Ga, P, and Si shutters and grow 25 nm-thick GaP with an interrupted growth method (10 cycles of 5 s open and 5 s closed) followed by 121 s of unshuttered growth (i.e., open Ga and p shutters simultaneously).</li>
	<li>Decrease the substrate temperature to 200 &#176;C and unload the sample from the vacuum chamber.</li>
</ol>
5. Remove Back n+ and SiNx Layers by Wet Etching
<ol>
	<li>Cover the GaP surface with a protective tape to protect it from the HF damage.</li>
	<li>Prepare ~300 mL of 49% HF solution in a plastic beaker.</li>
	<li>Place the sample in the HF solution for 5 min to fully remove the SiNx layer.</li>
	<li>Remove the protective tape, rinse with DI water, and dry by N2.</li>
	<li>Cover the GaP surface with a new protective tape.</li>
	<li>Prepare HNA solution in a plastic beaker (a mixture of hydrofluoric acid (HF) (50 mL), nitric acid (HNO3) (365 mL), and acetic acids (CH&#173;3COOH) (85 mL)) at room temperature. 
	CAUTION: Carefully place the wafer in the solution to avoid HNA penetrating into the GaP surface.</li>
	<li>Put the sample in the HNA solution for 3 min.</li>
	<li>Remove the protective tape and rinse by DI water. Dry by N2.</li>
</ol>
6. Hole-Selective Contact Formation on the Bare Si Side
<ol>
	<li>Cleave the wafer with a diamond pen into four quarters.</li>
	<li>Thoroughly clean the samples in a DI water tank.</li>
	<li>Clean the samples in a BOE bath for 30 s to remove the native oxide from the surface.</li>
	<li>Rinse in the wafers in DI water and then dry by N2.</li>
	<li>Deposit a 50 nm-thick a-Si: H by PECVD on one of the samples to check the Si lifetime.
	<ol>
		<li>Deposit the a-Si: H layer at 60 W RF power with a pressure of 3.2 Torr and 40 sccm of SiH4 as the silicon source (200 sccm of H2 was used as a diluent).</li>
		<li>Confirm the growth rate of a-Si: H (1.6 nm/s) by depositing a-Si films with different deposition times on polished wafers and measuring the thickness with VASE.</li>
	</ol>
	</li>
	<li>Deposit (i)a-Si (9 nm) and (p+)a-Si (16 nm) on the etched (front) side of a separate Si sample by PECVD.
	<ol>
		<li>Deposit the p-type a-Si layer at 37 W RF power with a pressure of 3.2 Torr and 40 sccm of SiH4 as the silicon source and 18 sccm of B[CH3]3 as the boron dopant (197 sccm of H2 was used as a diluent).</li>
		<li>Confirm the growth rate of p-type a-Si (2.0 nm/s) by depositing a-Si films with different growth times on the polished wafers and measuring the thicknesses with VASE.</li>
	</ol>
	</li>
	<li>Deposit a 9 nm-thick MoOx layer at the room temperature by the thermal evaporation from a MoO3 (99.99%) source with a deposition rate of 0.5 &#197;/s.</li>
</ol>
7. External Contact Formation
<ol>
	<li>Deposit 75 nm-thick Indium Tin Oxide (ITO) (In2O3/SnO2 = 95/5 (weight percent), 99.99%) layers on the GaP side of the samples by RF sputtering (RF power of 1 kW and pressure of 5 Torr) with an oxygen flow rate of 2.2 sccm.</li>
	<li>Unload the samples and turn them over. Then use the mesa shadow mask on the samples for ITO mesa deposition.</li>
	<li>Deposit 75 nm-thick ITO by RF sputtering. Deposit 200 nm-thick silver (RF power of 1 kW and pressure of 8 Torr) for the fingers covering the finger shadow mask. Deposit 200 nm-thick silver on the GaP side of the samples as the back contact.</li>
	<li>Anneal the samples in a furnace under atmospheric pressure at 220 &#176;C.</li>
</ol>

<ol>
	<li>Friedman, D. J. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Progress+and+challenges+for+next-generation+high-efficiency+multijunction+solar+cells.">Progress and challenges for next-generation high-efficiency multijunction solar cells.</a> Current Opinion in Solid State &amp; Materials Science. 14, 131-138 (2010).</li><li>Vadiee, E., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=AlGaSb-Based+Solar+Cells+Grown+on+GaAs:+Structural+investigation+and+device+performance.">AlGaSb-Based Solar Cells Grown on GaAs: Structural investigation and device performance.</a> IEEE Journal of Photovoltaics. , (2017).</li><li>Wagner, H., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=A+numerical+simulation+study+of+gallium-phosphide/silicon+heterojunction+passivated+emitter+and+rear+solar+cells.">A numerical simulation study of gallium-phosphide/silicon heterojunction passivated emitter and rear solar cells.</a> Journal of Applied Physics. 115, 044508 (2014).</li><li>Limpert, S., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Results+from+coupled+optical+and+electrical+sentaurus+TCAD+models+of+a+gallium+phosphide+on+silicon+electron+carrier+selective+contact+solar+cell.">Results from coupled optical and electrical sentaurus TCAD models of a gallium phosphide on silicon electron carrier selective contact solar cell.</a> 2014 IEEE 40th Photovoltaic Specialist Conference (PVSC). , 836-840 (2014).</li><li>Ding, L., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=On+the+source+of+silicon+minority-carrier+lifetime+degradation+during+molecular+beam+heteroepitaxial+growth+of+III-V+materials.">On the source of silicon minority-carrier lifetime degradation during molecular beam heteroepitaxial growth of III-V materials.</a> 2016 IEEE 43rd Photovoltaic Specialists Conference (PVSC). , 2048-2051 (2016).</li><li>Ding, L., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Silicon+minority-carrier+lifetime+degradation+during+molecular+beam+heteroepitaxial+III-V+material+growth.">Silicon minority-carrier lifetime degradation during molecular beam heteroepitaxial III-V material growth.</a> Energy Procedia. 92, 617-623 (2016).</li><li>Zhang, C., Kim, Y., Faleev, N. N., Honsberg, C. B. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Improvement+of+GaP+crystal+quality+and+silicon+bulk+lifetime+in+GaP/Si+heteroepitaxy.">Improvement of GaP crystal quality and silicon bulk lifetime in GaP/Si heteroepitaxy.</a> Journal of Crystal Growth. 475, 83-87 (2017).</li><li>Garc&#237;a-Tabar&#233;s, E., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Evolution+of+silicon+bulk+lifetime+during+III-V-on-Si+multijunction+solar+cell+epitaxial+growth.">Evolution of silicon bulk lifetime during III-V-on-Si multijunction solar cell epitaxial growth.</a> Progress in Photovoltaics: Research and Applications. 24, 634-644 (2016).</li><li>Varache, R., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Evolution+of+bulk+c-Si+properties+during+the+processing+of+GaP/c-Si+heterojunction+cell.">Evolution of bulk c-Si properties during the processing of GaP/c-Si heterojunction cell.</a> Energy Procedia. 77, 493-499 (2015).</li><li>Ishizaka, A., Shiraki, Y. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Low+temperature+surface+cleaning+of+silicon+and+its+application+to+silicon+MBE.">Low temperature surface cleaning of silicon and its application to silicon MBE.</a> Journal of The Electrochemical Society. 133, 666 (1986).</li><li>Zhang, C., Vadiee, E., King, R. R., Honsberg, C. B. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Carrier-selective+contact+GaP/Si+solar+cells+grown+by+molecular+beam+epitaxy.">Carrier-selective contact GaP/Si solar cells grown by molecular beam epitaxy.</a> Journal of Materials Research. 33, 414-423 (2018).</li><li>Battaglia, C., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Hole+Selective+MoOx+Contact+for+Silicon+Solar+Cells.">Hole Selective MoOx Contact for Silicon Solar Cells.</a> Nano Letters. 14, 967-971 (2014).</li></ol>

The authors have nothing to disclose.

A nominal 25 nm-thick GaP layer was epitaxially grown on a P-rich Si surface via MBE. To grow a better quality of GaP layer on Si substrates, a relatively low V/III (P/Ga) ratio is preferable. A good crystal quality of GaP layer is necessary to achieve high conductivity and low density of recombination centers. The AFM root-mean-square (RMS) of the GaP surface is ~0.52 nm showing a smooth surface with no pits, indicative of high crystal quality with a low threading dislocation density (Figure 1a). Further, pendellosung fringes were observed from the &#969;-2&#952; rocking curve (Figure 1b) indicative of smooth interfaces. The full width at half maximum (FWHM) of the GaP peak measured from the triple crystal &#969; rocking curve is ~14 arcsec and the threading dislocation density calculated is ~2&#215;106 cm-2. The RSM (Figure 1c) in the vicinity of (224) diffraction spots of the GaP/Si sample shows coherent GaP and Si peaks, which indicates GaP is fully strained to the Si substrate with good crystalline quality.
The critical step of achieving high-performance Si-based solar cells is to maintain high Si minority-carrier lifetimes throughout the deposition of GaP. It is shown that by inserting the n+ layer before the GaP growth, the Si bulk lifetime can be well-maintained (up to a milliseconds level). In addition, the GaP/Si lifetime was measured to be ~100 &#956;s after GaP growth in the MBE chamber. The achieved high lifetime of Si indicates a promising device performance (as shown in the Figure 2c). The light and pseudo J-V parameters for GaP/Si heterojunctions solar cells (a-Si/Si/GaP (Structure A) and MoOx/Si/GaP (Structure B)) are listed in Table 1, measured under an AM1.5G condition with irradiation intensity of 1 kW m-2. While ITO and Ag were applied as the contact layers to the GaP layer in this work, however, to achieve better performance of GaP/Si solar cells, it is recommended to optimize ITO thickness, transparency, and its conductivity.
In this work, MoOx was also used as a hole selective contact to further improve the carrier collection efficiency at short wavelengths. Benefitting from the higher bandgap of MoOx compared to the a-Si layers, the IQE shows a boost at the short wavelength regime (300 - 600 nm). The MoOx/Si/GaP solar cell demonstrated a better performance than the best performing MoOx/Si solar cells reported in the literature12 without inserting the passivation layer between MoOx and Si interface.
Although a high Si bulk lifetime can be achieved from the aforementioned approach, the minority-carrier lifetime of GaP/Si structure is still not comparable to a-Si passivated structures, which implies that the GaP layer quality should be further improved. The demonstrated approach which requires a diffusion step and SiNx coating layer could affect the surface quality of the Si; hence, the subsequent GaP crystal quality can be impacted. Furthermore, x-ray photoelectron spectroscopy (XPS) and secondary-ion mass spectrometry (SIMS) can be conducted to investigate the P-diffusion profile in this structure.
In this work, we have demonstrated the high-performance GaP/Si heterojunction solar cells by inserting n+ layers into Si substrates before the GaP growth. This protocol can be applied to maintain a high minority-carrier lifetime of Si while epitaxially growing not only GaP (presented here) but also to other III-V or II-VI materials to achieve heterojunction devices. Furthermore, multijunction solar cells with high-performance Si bottom cells can be realized by this approach.

There has been a continuing effort on the integration of different materials with lattice mismatches in order to enhance overall solar cell efficiency1,2. The III-V/Si integration has the potential to further increase the current Si solar cell efficiency and replace the expensive III-V substrates (such as GaAs and Ge) with a Si substrate for multijunction solar cell applications. Among all III-V binary material systems, gallium phosphide (GaP) is a good candidate for this purpose, as it has the smallest lattice-mismatch (~0.4%) with Si and a high indirect bandgap. These features can enable high-quality integration of GaP with Si substrate. It has been theoretically shown that GaP/Si heterojunction solar cells could enhance the efficiency of conventional passivated emitter rear Si solar cells3,4 by benefiting from the unique band-offset between GaP and Si (&#8710;Ev ~1.05 eV and &#8710;Ec ~0.09 eV). This makes GaP a promising electron selective contact for silicon solar cells. However, in order to achieve high-performance GaP/Si heterojunction solar cells, a high Si bulk lifetime and high GaP/Si interface quality are required.
During the growth of III-V materials on a Si substrate by molecular beam epitaxy (MBE) and metalorganic vapor phase epitaxy (MOVPE), significant Si lifetime degradation has been widely observed5,6,7,8,9. It was revealed that the lifetime degradation mainly happens during the thermal treatment of the Si wafers in the reactors, which is required for surface oxide desorption and/or surface reconstruction before the epitaxial growth10. This degradation was ascribed to the extrinsic diffusion of contaminants originated from the growth reactors5,7. Several approaches have been proposed to suppress this Si lifetime degradation. In our previous work, we have demonstrated two methods in which the Si lifetime degradation can be significantly suppressed. The first method was demonstrated by the introduction of SiNx as a diffusion barrier7 and the second one by introducing the P-diffusion layer as a gettering agent11 to the Si substrate.
In this work, we have demonstrated high-performance GaP/Si solar cells based on the aforementioned approaches to mitigate the silicon bulk lifetime degradation. The techniques used to preserve the Si lifetime can have broad applications in multijunction solar cells with active Si bottom cells and electronic devices such as high-mobility CMOS. In this detailed protocol, the fabrication details of GaP/Si heterojunction solar cells, including Si wafer cleaning, P-diffusion in the furnace, GaP growth, and GaP/Si solar cells processing, are presented.

<table>
	<tbody>
		<tr>
			<td>Hydrogen peroxide, 30%</td>
			<td>Honeywell</td>
			<td>10181019</td>
			<td></td>
		</tr>
		<tr>
			<td>Sulfuric acid, 96%</td>
			<td>KMG electronic chemicals, Inc.</td>
			<td>64103</td>
			<td></td>
		</tr>
		<tr>
			<td>Hydrochloric acid, 37%</td>
			<td>KMG electronic chemicals, Inc.</td>
			<td>64009</td>
			<td></td>
		</tr>
		<tr>
			<td>Buffered Oxide Etch 10:1</td>
			<td>KMG electronic chemicals, Inc.</td>
			<td>62060</td>
			<td></td>
		</tr>
		<tr>
			<td>Hydrofluoric acid, 49%</td>
			<td>Honeywell</td>
			<td>10181736</td>
			<td></td>
		</tr>
		<tr>
			<td>Acetic acid</td>
			<td>Honeywell</td>
			<td>10180830</td>
			<td></td>
		</tr>
		<tr>
			<td>Nitride acid, 69.5%</td>
			<td>KMG electronic chemicals, Inc.</td>
			<td>200288</td>
			<td></td>
		</tr>
	</tbody>
</table>

developing high performance gap/si heterojunction solar cells

To improve the efficiency of Si-based solar cells beyond their Shockley-Queisser limit, the optimal path is to integrate them with III-V-based solar cells. In this work, we present high performance GaP/Si heterojunction solar cells with a high Si minority-carrier lifetime and high crystal quality of epitaxial GaP layers. It is shown that by applying phosphorus (P)-diffusion layers into the Si substrate and a SiNx layer, the Si minority-carrier lifetime can be well-maintained during the GaP growth in the molecular beam epitaxy (MBE). By controlling the growth conditions, the high crystal quality of GaP was grown on the P-rich Si surface. The film quality is characterized by atomic force microscopy and high-resolution x-ray diffraction. In addition, MoOx was implemented as a hole-selective contact that led to a significant increase in the short-circuit current density. The achieved high device performance of the GaP/Si heterojunction solar cells establishes a path for further enhancement of the performance of Si-based photovoltaic devices.

Atomic force microscopy (AFM) images and high-resolution x-ray diffraction (XRD) scans, including the rocking curve in the vicinity of the (004) reflection and the reciprocal space map (RSM) in the vicinity of (224) reflection, were collected for the GaP/Si structure (Figure 1). The AFM was used to characterize the surface morphology of the MBE-grown GaP and XRD was used to examine the crystal quality of GaP layer. The effective minority-carrier lifetime of the GaP/Si structure and Si bulk were measured to examine the effectiveness of the lifetime preserving methods used in this work. External quantum efficiency (EQE), surface reflection, pseudo light J-V (Suns-Voc), and light J-V of the GaP/Si final devices were collected (Figure 2). The internal quantum efficiency (IQE) was generated from the reflection corrected EQE data. The light and pseudo J-V parameters are listed in Table 1. Efficiencies of 13.1% and 14.1% with an open-circuit voltage (Voc) of 618 mV and 598 mV are achieved from Structure A and B, respectively. The MoOx layer in Structure B as a hole-selective contact performed better than better than the a-Si: H in Structure A.
<img alt="Figure 1" class="xfigimg" src="/files/ftp_upload/58292/58292fig1.jpg" /> 
Figure 1: Characterization of the GaP layer of the GaP/Si structure. (a) 1 x 1 &#956;m2 AFM image of the 25 nm-thick GaP surface. (b) The coherent double crystal (DC) &#969;-2&#952; rocking curve (black) in the vicinity of Si and GaP (004) reflections (a fitted curve (red) of the structure is also presented). (c) Reciprocal space map of (224) diffraction spots. <a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/58292/58292fig1large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Figure 2" class="xfigimg" src="/files/ftp_upload/58292/58292fig2.jpg" /> 
Figure 2: Electrical characteristics of the GaP/Si heterojunction devices. (a) The effective minority-carrier lifetime of GaP/Si structure (black dots) and Si bulk lifetime (red dots). (b) The IQE and surface reflection spectra of a-Si/Si/GaP (Structure A) (black) and MoOx/Si/GaP (Structure B) (blue). (c) Light J-V (black) and pseudo light J-V (red) of a-Si/Si/GaP device. (d) Light J-V (black) and pseudo light J-V (red) of MoOx/Si/GaP device. <a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/58292/58292fig2large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<table border="1" fo:keep-together.within-page="1" fo:keep-with-next.within-page="always">
	<tbody>
		<tr>
			<td rowspan="2"></td>
			<td>VOC</td>
			<td>JSC</td>
			<td>FF</td>
			<td>FF0</td>
			<td>WOC</td>
			<td>&#951;</td>
			<td>&#951;0</td>
		</tr>
		<tr>
			<td>(mV)</td>
			<td>(mA/cm2)</td>
			<td>(%)</td>
			<td>(%)</td>
			<td>(mV)</td>
			<td>(%)</td>
			<td>(%)</td>
		</tr>
		<tr>
			<td>Structure A</td>
			<td>618</td>
			<td>33.1</td>
			<td>64</td>
			<td>80</td>
			<td>522</td>
			<td>13.1</td>
			<td>16.5</td>
		</tr>
		<tr>
			<td>Structure B</td>
			<td>598</td>
			<td>34.3</td>
			<td>69</td>
			<td>80</td>
			<td>542</td>
			<td>14.1</td>
			<td>16.9</td>
		</tr>
	</tbody>
</table>
Table 1. Light and pseudo J-V values for GaP/Si heterojunctions solar cells.

Watch this Scientific Journal Video about Developing High Performance GaP/Si Heterojunction Solar Cells at JoVE.com

Developing High Performance GaP/Si Heterojunction Solar Cells

Here, we present a protocol to develop high-performance GaP/Si heterojunction solar cells with a high Si minority-carrier lifetime.

To improve the efficiency of Si-based solar cells beyond their Shockley-Queisser limit, the optimal path is to integrate them with III-V-based solar ...

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7.4K Views.  Arizona State University. Here, we present a protocol to develop high-performance GaP/Si heterojunction solar cells with a high Si minority-carrier lifetime.

Video: Developing High Performance GaP/Si Heterojunction Solar Cells

Polycrystalline Silicon Thin-film Solar cells with Plasmonic-enhanced Light-trapping

One of major approaches to cheaper solar cells is reducing the amount of semiconductor material used for their fabrication and making cells thinner. To compensate for lower light absorption such physically thin devices have to incorporate light-trapping which increases their optical thickness. Light scattering by textured surfaces is a common technique but it cannot be universally applied to all solar cell technologies. Some cells, for example those made of evaporated silicon, are planar as produced and they require an alternative light-trapping means suitable for planar devices. Metal nanoparticles formed on planar silicon cell surface and capable of light scattering due to surface plasmon resonance is an effective approach.
The paper presents a fabrication procedure of evaporated polycrystalline silicon solar cells with plasmonic light-trapping and demonstrates how the cell quantum efficiency improves due to presence of metal nanoparticles.
To fabricate the cells a film consisting of alternative boron and phosphorous doped silicon layers is deposited on glass substrate by electron beam evaporation. An Initially amorphous film is crystallised and electronic defects are mitigated by annealing and hydrogen passivation. Metal grid contacts are applied to the layers of opposite polarity to extract electricity generated by the cell. Typically, such a ~2 &mu;m thick cell has a short-circuit current density (Jsc) of 14-16 mA/cm2, which can be increased up to 17-18 mA/cm2 (~25% higher) after application of a simple diffuse back reflector made of a white paint.
To implement plasmonic light-trapping a silver nanoparticle array is formed on the metallised cell silicon surface. A precursor silver film is deposited on the cell by thermal evaporation and annealed at 23&deg;C to form silver nanoparticles. Nanoparticle size and coverage, which affect plasmonic light-scattering, can be tuned for enhanced cell performance by varying the precursor film thickness and its annealing conditions. An optimised nanoparticle array alone results in cell Jsc enhancement of about 28%, similar to the effect of the diffuse reflector. The photocurrent can be further increased by coating the nanoparticles by a low refractive index dielectric, like MgF2, and applying the diffused reflector. The complete plasmonic cell structure comprises the polycrystalline silicon film, a silver nanoparticle array, a layer of MgF2, and a diffuse reflector. The Jsc for such cell is 21-23 mA/cm2, up to 45% higher than Jsc of the original cell without light-trapping or ~25% higher than Jsc for the cell with the diffuse reflector only.
Introduction
Light-trapping in silicon solar cells is commonly achieved via light scattering at textured interfaces. Scattered light travels through a cell at oblique angles for a longer distance and when such angles exceed the critical angle at the cell interfaces the light is permanently trapped in the cell by total internal reflection (Animation 1: Light-trapping). Although this scheme works well for most solar cells, there are developing technologies where ultra-thin Si layers are produced planar (e.g. layer-transfer technologies and epitaxial c-Si layers) 1 and or when such layers are not compatible with textures substrates (e.g. evaporated silicon) 2. For such originally planar Si layer alternative light trapping approaches, such as diffuse white paint reflector 3, silicon plasma texturing 4 or high refractive index nanoparticle reflector 5 have been suggested.
Metal nanoparticles can effectively scatter incident light into a higher refractive index material, like silicon, due to the surface plasmon resonance effect 6. They also can be easily formed on the planar silicon cell surface thus offering a light-trapping approach alternative to texturing. For a nanoparticle located at the air-silicon interface the scattered light fraction coupled into silicon exceeds 95% and a large faction of that light is scattered at angles above critical providing nearly ideal light-trapping condition (Animation 2: Plasmons on NP). The resonance can be tuned to the wavelength region, which is most important for a particular cell material and design, by varying the nanoparticle average size, surface coverage and local dielectric environment 6,7. Theoretical design principles of plasmonic nanoparticle solar cells have been suggested 8. In practice, Ag nanoparticle array is an ideal light-trapping partner for poly-Si thin-film solar cells because most of these design principle are naturally met. The simplest way of forming nanoparticles by thermal annealing of a thin precursor Ag film results in a random array with a relatively wide size and shape distribution, which is particularly suitable for light-trapping because such an array has a wide resonance peak, covering the wavelength range of 700-900 nm, important for poly-Si solar cell performance. The nanoparticle array can only be located on the rear poly-Si cell surface thus avoiding destructive interference between incident and scattered light which occurs for front-located nanoparticles 9. Moreover, poly-Si thin-film cells do not requires a passivating layer and the flat base-shaped nanoparticles (that naturally result from thermal annealing of a metal film) can be directly placed on silicon further increases plasmonic scattering efficiency due to surface plasmon-polariton resonance 10.
The cell with the plasmonic nanoparticle array as described above can have a photocurrent about 28% higher than the original cell. However, the array still transmits a significant amount of light which escapes through the rear of the cell and does not contribute into the current. This loss can be mitigated by adding a rear reflector to allow catching transmitted light and re-directing it back to the cell. Providing sufficient distance between the reflector and the nanoparticles (a few hundred nanometers) the reflected light will then experience one more plasmonic scattering event while passing through the nanoparticle array on re-entering the cell and the reflector itself can be made diffuse - both effects further facilitating light scattering and hence light-trapping. Importantly, the Ag nanoparticles have to be encapsulated with an inert and low refractive index dielectric, like MgF2 or SiO2, from the rear reflector to avoid mechanical and chemical damage 7. Low refractive index for this cladding layer is required to maintain a high coupling fraction into silicon and larger scattering angles, which are ensured by the high optical contrast between the media on both sides of the nanoparticle, silicon and dielectric 6. The photocurrent of the plasmonic cell with the diffuse rear reflector can be up to 45% higher than the current of the original cell or up to 25% higher than the current of an equivalent cell with the diffuse reflector only.

Polycrystalline silicon thin-film solar cells on glass are fabricated by deposition of boron and phosphorous doped silicon layers followed by crystallisation, defect passivation and metallisation. Plasmonic light-trapping is introduced by forming Ag nanoparticles on the silicon cell surface capped with a diffused reflector resulting in ~45% photocurrent enhancement.

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Research and Development of High-performance Explosives

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