This work was supported by the National Science Council, Taiwan under contract No. MOST 105-2112-M-003-016-MY3. This work was also in part supported by the National Nano Device Laboratories and e-beam laboratory in electrical engineering of National Taiwan University.

1. 2D Quasi-heterojunction Transistors Fabrication Process
<ol>
	<li>Prepare commercial c-plane sapphire.
	<ol>
		<li>Wash the whole single-side polished sapphire (2-inch) with acetone.</li>
		<li>Rinse the sapphire substrate with isopropyl alcohol.</li>
	</ol>
	</li>
	<li>Grow MoS2 on sapphire substrate using CVD in a hot-wall furnace.
	<ol>
		<li>Place 0.6 g of molybdenum trioxide (MoO3) powder in a quartz boat located at the heating zone center of the furnace. Put the sapphire substrate downstream next to the quartz boat containing the MoO3 powder.</li>
		<li>Prepare sulfur (S) powder in a separate quartz boat at the upstream side of the furnace. Maintain its temperature at 190 &#176;C during the reaction.</li>
		<li>Use argon (Ar = 70 sccm, 40 Torr) gas flow to bring the S and MoO3 vapors to the sapphire substrate while heating the center zone to 750 &#176;C.</li>
		<li>Keep the heating zone, after reaching the desired growth temperature of 750 &#176;C, for 15 min and then naturally cool down the furnace to room temperature.</li>
	</ol>
	</li>
	<li>Perform EBL. 
	NOTE: A thin Au of about 5 nm was deposited by the sputtering for discharging during all EBL processes on sapphire substrate
	<ol>
		<li>Identify, using an optical microscope, an area where MoS2 monolayer flakes are observed, then design the stripe pattern layout for that specific area using a design software (AutoCAD).</li>
		<li>Spin-coat photoresist (PR), for example polymethyl methacrylate (PMMA) or P015, on top of the sample at 2000 rpm for 60 s (room temperature). Ensure that the PR has covered the entire sample after spin coating.</li>
		<li>Heat the sample (Soft Bake) at 100 &#176;C for 90 s in order to evaporate the solvents in the PR and enhance the adhesion.</li>
		<li>Convert the pattern layout in step 1.3.1 into a specific file (example: GDS file), and upload it in the EBL software.</li>
		<li>Determine the ideal dose of electron beam based on the width of the lines in the layout. 
		NOTE: For line width narrower than 1 &#181;m, the ideal dose of electron beam is 110 &#181;C/cm2; for 1 to 5 &#181;m line width, the dose is 100 &#181;C/cm2; and for line width wider than 5 &#181;m, the dose is 80 &#181;C/cm2.</li>
		<li>Start exposing the sample to electron beam.</li>
		<li>Apply post-exposure bake (PEB) on the sample after the exposure in order to reduce the standing wave effects. Heat the sample at 120 &#176;C for 90 s.</li>
		<li>Use tetramethylammonium hydroxide (TMAH) 2.38% as developer. Immerse the sample to TMAH for 80 s. Wash out the TMAH with 200 mL of deionized water for 10 s.</li>
		<li>Examine if the pattern is well developed by optical microscopy.</li>
		<li>Conduct hard bake to get rid of extra water in PR. Heat the sample at 110 &#176;C for 90 s.</li>
	</ol>
	</li>
	<li>Define the stripe structures using 50 W oxygen (O2) plasma etching (1st etching) for 30 s to 2 min and remove PR using 50 mL of acetone.</li>
	<li>Grow tungsten diselenide (WSe2) using CVD on the target location, which will result in a preferred growth of WSe2 layer between the already existing MoS2 stripes on the sapphire substrate.
	<ol>
		<li>Place 0.6 g of tungsten trioxide (WO3) powder in a quartz boat located at the heating zone center of the furnace. Put the sapphire substrate downstream next to the quartz boat containing the WO3 powder.</li>
		<li>Prepare selenium (Se) powder in a separate quartz boat at the upstream side of the furnace. Maintain its temperature at 260 &#176;C during the reaction.</li>
		<li>Use Ar/H2 (Ar = 90 sccm, H2 = 6 sccm, 20 Torr) gas flow to bring the Se and WO3 vapors to the sapphire substrate while heating the center zone to 925 &#176;C.</li>
		<li>Keep the heating zone, after reaching the desired growth temperature of 925 &#176;C, for 15 min and then naturally cool down the furnace to room temperature.</li>
	</ol>
	</li>
	<li>Fabricate the metal pad arrays and alignment marks.
	<ol>
		<li>Overlay the patterns of metal pad arrays and alignment the marks using photolithography patterning technique.</li>
		<li>Deposit 20 nm/60 nm Ti/Au using electron gun evaporator. 
		NOTE: Gold is used to avoid the oxidization of the metal pads.</li>
		<li>Prepare and submerge the sample to 100 mL of acetone to dissolve PR and perform lift-off. Shake and blow the acetone while monitoring the whole process via optical microscopy until the metal pads become apparent.</li>
	</ol>
	</li>
	<li>Perform another EBL process to overlay a ribbon shape pattern on top of the MoS2-WSe2 heterojunction.
	<ol>
		<li>Measure the coordinate displacement between the target locations in the MoS2-WSe2 heterojunction and the alignment marks using optical microscopy and design the ribbon-shape layout based on these measurements using a software (AutoCAD).</li>
		<li>Spin-coat PR, for example PMMA or P015, on top of the sample at 2000 rpm for 60 s (room temperature). Ensure that the PR has covered the entire sample after spin coating.</li>
		<li>Heat the sample (Soft Bake) at 100 &#176;C for 90 s in order to evaporate the solvents in the PR and enhance the adhesion.</li>
		<li>Convert the pattern layout in step 1.7.1 into a specific file (example: GDS file), and upload it in the EBL software.</li>
		<li>Determine the ideal dose of electron beam based on the width of the lines in the layout. 
		NOTE: For line width narrower than 1 &#181;m, the ideal dose of electron beam is 110 &#181;C/cm2; for 1 to 5 &#181;m line width, the dose is 100 &#181;C/cm2; and for line width wider than 5 &#181;m, the dose is 80 &#181;C/cm2.</li>
		<li>Set up the EBL machine such that the position of the alignment marks in the sapphire substrate matches its correspondence in the layout.</li>
		<li>Start exposing the sample to electron beam.</li>
		<li>Apply PEB on the sample after exposure in order to reduce the standing wave effects. Heat the sample at 120 &#176;C for 90 s.</li>
		<li>Use TMAH 2.38% as the developer. Immerse the sample to TMAH for 80 s. Wash out the TMAH with 200 mL deionized water for 10 s.</li>
		<li>Examine if the pattern is well developed by optical microscopy.</li>
		<li>Conduct hard bake to get rid of extra water in PR. Heat the sample at 110 &#176;C for 90 s.</li>
	</ol>
	</li>
	<li>Use O2 plasma etching (2nd etching) to define a ribbon-shaped lateral heterojunction, and remove PR by acetone.</li>
	<li>Perform the EBL process to overlay the pattern of the Ti/Au metal electrodes.
	<ol>
		<li>Measure the coordinate displacement between the target locations in the MoS2-WSe2 heterojunction and the alignment marks using optical microscopy and design the metal electrode layout based on these measurements using a software (AutoCAD).</li>
		<li>Spin-coat PR, for example PMMA or P015, on top of the sample at 2000 rpm for 60 s (room temperature). Ensure that the PR has covered the entire sample after spin coating.</li>
		<li>Heat the sample (Soft Bake) at 100 &#176;C for 90 s in order to evaporate the solvents in the PR and enhance the adhesion.</li>
		<li>Convert the pattern layout in step 1.9.1 into a specific file (example: GDS file), and upload it in the EBL software.</li>
		<li>Determine the ideal dose of electron beam based on the width of the metal lines in the layout. 
		NOTE: For metal line width narrower than 1 &#181;m, the ideal dose of electron beam is 110 &#181;C/cm2; for 1 to 5 &#181;m line width, the dose is 100 &#181;C/cm2; and for line width wider than 5 &#181;m, the dose is 80 &#181;C/cm2.</li>
		<li>Set up the EBL machine such that the positions of the alignment marks in the sapphire substrate matches its correspondence in the layout.</li>
		<li>Start exposing the sample to electron beam.</li>
		<li>Apply PEB on the sample after exposure in order to reduce the standing wave effects. Heat the sample at 120 &#176;C for 90 s.</li>
		<li>Use TMAH 2.38% as the developer. Immerse the sample to TMAH for 80 s. Wash out the TMAH with 200 mL deionized water for 10 s.</li>
		<li>Examine if the pattern is well developed by optical microscopy.</li>
		<li>Conduct hard bake to get rid of extra water in PR. Heat the sample at 110 &#176;C for 90 s.</li>
	</ol>
	</li>
	<li>Perform Ti/Au Metal Deposition and Lift-off
	<ol>
		<li>Deposit Ti/Au metal using electron gun evaporator with the thickness of less than 100 nm, otherwise, it will be difficult to remove the PR and the unwanted metal by lift-off.</li>
		<li>Prepare and submerge the sample to 100 mL of acetone to dissolve PR and perform lift-off. Shake and blow the acetone while monitoring the whole process via optical microscopy until there are only metal lines and pads left.</li>
	</ol>
	</li>
	<li>Perform the EBL process in step 1.9 but overlay the Pd/Au metal electrode&#39;s pattern instead of Ti/Au.</li>
	<li>Perform the metal deposition and lift-off process in step 1.10 but deposit Pd/Au instead of Ti/Au.</li>
</ol>
2. 2D Back-gated Transistors Fabrication Process
<ol>
	<li>Prepare back-gated Si/SiO2 substrates with alignment marks.
	<ol>
		<li>Prepare homemade or commercial SiO2/Si substrate.</li>
		<li>Use photolithography or EBL patterning techniques to define the alignment mark.</li>
		<li>Perform reactive ion etching (RIE) on the SiO2/Si substrate until the total depth of the target area reaches 1000 nm and remove the PR by O2 plasma to reveal the formed alignment marks.</li>
		<li>Overlay the patterns of metal pad arrays using photolithography patterning technique.</li>
		<li>Deposit 20 nm/60 nm Ti/Au using electron gun evaporator. 
		NOTE: Gold is used to avoid oxidization of the metal pads.</li>
		<li>Prepare and submerge the sample to 100 mL of acetone to dissolve PR and perform lift-off. Shake and blow the acetone while monitoring the whole process by optical microscopy until the metal pads become apparent.</li>
	</ol>
	</li>
	<li>Perform CVD of MoS2 on sapphire substrate in a hot-wall furnace.
	<ol>
		<li>Place 0.6 g of MoO3 powder in a quartz boat located at the heating zone center of the furnace. Put the sapphire substrate downstream next to the quartz boat containing the MoO3 powder.</li>
		<li>Prepare S powder in a separate quartz boat at the upstream side of the furnace. Maintain its temperature at 190 &#176;C during the reaction.</li>
		<li>Use argon (Ar = 70 sccm, 40 Torr) gas flow to bring the S and MoO3 vapors to the sapphire substrate while heating the center zone to 750 &#176;C.</li>
		<li>Keep the heating zone, after reaching the desired growth temperature of 750 &#176;C, for 15 min and then naturally cool down the furnace to room temperature.</li>
	</ol>
	</li>
	<li>Transfer MoS2 from the sapphire to the back-gated SiO2/Si substrate.
	<ol>
		<li>Spin coat PMMA with the spin speed of 3500 rpm for 30 s on top of the MoS2 film.</li>
		<li>Bake the MoS2/sapphire sample at 120 &#176;C for 3 min in order to strengthen the PMMA coating.</li>
		<li>Dip the MoS2/Sapphire sample into 50 mL of ammonia solution (14.5%) for around 30 min to 2 h to separate the MoS2 film from the sapphire substrate.</li>
		<li>Pick up the film and transfer it to the SiO2/Si substrate.</li>
		<li>Bake the MoS2/SiO2/Si sample in order to enhance the adhesion between the MoS2 and SiO2 layers. Heat the sample at 120 &#176;C for around 30 min to 1 h.</li>
		<li>Remove the PMMA by washing it with 30 mL of acetone for around 30 min to 2 h.</li>
		<li>Rinse the sample with isopropyl alcohol and use nitrogen to blow it dry.</li>
	</ol>
	</li>
	<li>Perform EBL. 
	NOTE: There is no thin Au deposited on SiO2/Si substrate during EBL process since Si is somehow conductive.
	<ol>
		<li>Measure the coordinate displacement between the target locations and the alignment marks using optical microscopy and, based on these measurements, design the pattern layout of the metal electrodes using a design software. 
		NOTE: Metal electrodes connect the target points in the MoS2 sample to the metal pads in the SiO2/Si substrate.</li>
		<li>Spin-coat PR, for example PMMA or P015, on top of the sample at 2000 rpm for 60 s (room temperature). Ensure that the PR has covered the entire sample.</li>
		<li>Heat the sample (Soft Bake) at 100 &#176;C for 90 s in order to evaporate the solvents in the PR and enhance the adhesion.</li>
		<li>Convert the pattern layout in step 2.4.1 into a specific file (example: GDS file), and upload it in the EBL software.</li>
		<li>Determine the ideal dose of electron beam based on the width of the metal lines in the layout. 
		NOTE: For metal line width narrower than 1 &#181;m, the ideal dose of electron beam is 110 &#181;C/cm2; for 1 to 5 &#181;m line width, the dose is 100 &#181;C/cm2; and for line width wider than 5 &#181;m, the dose is 80 &#181;C/cm2.</li>
		<li>Set up the EBL machine such that the position of the alignment marks in the Si/SiO2 substrate matches its correspondence in the layout.</li>
		<li>Start exposing the sample to electron beam.</li>
		<li>Apply PEB on the sample after the exposure in order to reduce the standing wave effects. Heat the sample at 120 &#176;C for 90 s.</li>
		<li>Use TMAH 2.38% as the developer. Immerse the sample to TMAH for 80 s. Wash out the TMAH with 200 mL of deionized water for 10 s.</li>
		<li>Examine if the pattern is well developed by optical microscopy.</li>
		<li>Conduct hard bake to get rid of extra water in PR. Heat the sample at 110 &#176;C for 90 s.</li>
	</ol>
	</li>
	<li>Perform Au Metal Deposition and Lift-off
	<ol>
		<li>Deposit Au metal using electron gun evaporator with the thickness of less than 100 nm, otherwise, it will be difficult to remove the PR and the unwanted metal by lift-off.</li>
		<li>Prepare and submerge the sample to 100 mL of acetone to dissolve PR and perform lift-off. Shake and blow the acetone while monitoring the process via optical microscopy until there are only metal lines and pads left.</li>
	</ol>
	</li>
</ol>

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The authors have nothing to disclose.

In this article, the detailed procedures of fabricating novel electronics based on 2D materials in nanometer scale are demonstrated. Since the sample preparation procedures of each application have differences with each other, the overlapped processes were treated as the protocol. Electron beam patterning combined with material location determination and metal electrode definition thus serves as the protocol here. Among the two types of devices mentioned, the whole process of 2D back-gated transistors starting at wet transferring single crystal MoS2 films onto SiO2/Si substrates and ending at metal lift-off were presented. The reason why focus is given on 2D back gated transistors is the urgent need of improved 2D materials-based field effect transistors (FETs). Therefore, important points related to its fabrication process will be emphasized in the following paragraphs.
There are some tricky points in every step of the experiments. Firstly, the precedence of material locating followed by the removal of PMMA is required to avoid unfavorable adsorption while exposing the MoS2 films to air. The adsorption is one of the causes of performance degradation. Consequently, baking the sample, with a duration that is supposed to be longer than 30 min, after the transfer is necessary. Otherwise, the film is easy to be peeled off when dissolving PMMA with acetone due to the poor attachment of the films and dielectric, which results in the disappearance of the flakes at target positions. The dose of electron beam is another critical factor for patterning. High electron beam dosage is not suitable for patterns with narrow spacing between electrodes due to the proximity effect. On the other hand, decreasing its dosage may lead to the inability to achieve the ideal pattern. Fine tuning of the parameters of electron beam therefore needs to be conducted. Basically, a thin metal is preferable for easier lift-off, and its ideal thickness depends on the application and the thickness of the photo resist. For the 2D transistor in this project, metal thickness below 100 nm is acceptable.
One limitation of the method is that manual operation is required, so it is only suitable for research purposes. Once wafer scale synthesis techniques of these materials become well-developed, traditional semiconductor technology can take over this approach. Also, a trade-off between getting a higher resolution and material quality exists when choosing between optical imaging and the alternative method using scanning electron microscope (SEM) in determining the material location. The optical imaging method used in this protocol provides micrometer scale precision for locating positions, while SEM is more precise but could induce damage in the material. Therefore, using optical imaging as proposed in the protocol is the most expedient by far.
Since years of research seeking for the best way to develop new materials is indispensable, laboratory scope manufacturing with hands-on experiments still occupies an important position. Surely, this method can serve not only for 2D materials but also for 1D and the undiscovered materials in future, broadening the possibilities of nanoscale electronics.

Since past decades, mankind has been experiencing rapid downscale in the size of transistors and, consequently, an exponential increase in the number of transistors in integrated circuits (ICs). This maintains the continuous progress of silicon-based complementary metal-oxide semiconductor (CMOS) technology1. Moreover, this current trend in the size and performance of fabricated devices are still on-track with Moore&#39;s law, which states that the number of transistors on electronic chips, as well as their performance, doubles roughly every two years2. CMOS transistors are present in most, if not all, of the electronic devices available in the market and thus making it an integral part of human lives. Due to this, there are continuous demands for improvements in chip size and performance which have been pushing the manufacturers to keep following the Moore&#39;s law track.
Unfortunately, Moore&#39;s law appears to be nearing its end due to the amount of heat generated as more silicon circuitry is squeezed into a small area2. This calls for new types of materials that can provide the same, if not better, performance as silicon and, at the same time, can be implemented in a relatively smaller scale. Recently, new promising materials have been subjects of many material science researches. Such materials as one-dimensional (1D) carbon nanotubes3,4,5,6,7, 2D graphene8,9,10,11,12, and transition metal dichalcogenides (TMDs)13,14,15,16,17,18, are good candidates that can be used as substitute for the silicon-based CMOS and continue the Moore&#39;s law track.
Fabrication of small-scale devices requires careful determination of the material&#39;s location to successfully proceed to the other fabrication techniques such as lithography and metal electrode definition. So, the method presented in this paper was designed to address this need. Compared to the traditional semiconductor fabrication techniques19, the approach presented in this paper is tailor-fitted to the development of small-scale devices which needs more attention in terms of finding the location of the material. The aim of this method is to reliably fabricate 2D nanomaterial devices, such as 2D back-gated transistors and Q-HBTs, using standard fabrication processes. This can serve as a platform for future nanodevice developments as it paves the way towards the production of future advanced nano-scale devices.
In the proceeding section, the fabrication processes for 2D materials-based devices namely, the Q-HBT and 2D back-gated transistor are discussed in detail. Electron beam patterning combined with material location determination and metal electrode definition comprises the protocol since they are required in both mentioned processes. Part 1 discusses the step-by-step fabrication process of Q-HBTs20; and part 2 demonstrates a universal approach to obtain chemical vapor deposition (CVD) molybdenum disulfide (MoS2) back-gated transistors from transfer to lift-off21, which has been completely shown in the article. The detailed process flow is illustrated in (Figure 1).

<table border="0" cellpadding="0" cellspacing="0" style="width:973px;" width="973">
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			<td height="21" style="height:21px;width:248px;">E-gun Evaporator</td>
			<td style="width:175px;">AST</td>
			<td style="width:255px;">PEVA 600I</td>
			<td style="width:296px;"></td>
		</tr>
		<tr height="21">
			<td height="21" style="height:21px;width:248px;">Au slug, 99.99%</td>
			<td>Well-Being Enterprise Co</td>
			<td>&#160;N/A</td>
			<td></td>
		</tr>
		<tr height="21">
			<td height="21" style="height:21px;width:248px;">Ti slug, 99.99%</td>
			<td>Well-Being Enterprise Co</td>
			<td>&#160;N/A</td>
			<td></td>
		</tr>
		<tr height="21">
			<td height="21" style="height:21px;width:248px;">E-beam Lithography System</td>
			<td style="width:175px;">Elionix</td>
			<td style="width:255px;">ELS7500-EX</td>
			<td></td>
		</tr>
		<tr height="21">
			<td height="21" style="height:21px;width:248px;">Cold Wall CVD System</td>
			<td style="width:175px;">Sulfur Science</td>
			<td style="width:255px;">SCW600S</td>
			<td></td>
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		<tr height="21">
			<td height="21" style="height:21px;width:248px;">C-plane Sapphire substrate</td>
			<td style="width:175px;">Summit-Tech</td>
			<td style="width:255px;">X171999</td>
			<td>(0001) &#177; 0.2 &#176; one side polished</td>
		</tr>
		<tr height="21">
			<td height="21" style="height:21px;width:248px;">100 nm SiO2/Si</td>
			<td style="width:175px;"></td>
			<td style="width:255px;"></td>
			<td>Fabricated in NDL</td>
		</tr>
		<tr height="21">
			<td height="21" style="height:21px;width:248px;">Ammonia Solution</td>
			<td style="width:175px;">BASF</td>
			<td style="width:255px;">Ammonia Solution 28% Selectipur</td>
			<td style="width:296px;"></td>
		</tr>
		<tr height="21">
			<td height="21" style="height:21px;width:248px;">Molybdenum (Mo), 99.95%</td>
			<td style="width:175px;">Summit-Tech&#160;</td>
			<td style="width:255px;">N/A</td>
			<td></td>
		</tr>
		<tr height="21">
			<td height="21" style="height:21px;width:248px;">Tungsten (W), 99.95%</td>
			<td style="width:175px;">Summit-Tech&#160;</td>
			<td style="width:255px;">N/A</td>
			<td></td>
		</tr>
		<tr height="21">
			<td height="21" style="height:21px;width:248px;">Sulfur (S), 99.5%</td>
			<td style="width:175px;">Sigma-Aldrich&#160;</td>
			<td style="width:255px;">13803</td>
			<td></td>
		</tr>
		<tr height="21">
			<td height="21" style="height:21px;width:248px;">Polymethyl Methacrylate (PMMA)</td>
			<td style="width:175px;">Microchem&#160;</td>
			<td style="width:255px;">8110788</td>
			<td>Use for transfer process</td>
		</tr>
		<tr height="21">
			<td height="21" style="height:21px;width:248px;">Spin Coater</td>
			<td>Laurell&#160;</td>
			<td>WS 400B 6NPP LITE</td>
			<td></td>
		</tr>
		<tr height="21">
			<td height="21" style="height:21px;width:248px;">Acetone</td>
			<td style="width:175px;">BASF</td>
			<td style="width:255px;">Acetone EL Selectipur</td>
			<td></td>
		</tr>
		<tr height="21">
			<td height="21" style="height:21px;width:248px;">Isopropanol (IPA)</td>
			<td style="width:175px;">BASF</td>
			<td style="width:255px;">2-Propanol UPS</td>
			<td></td>
		</tr>
		<tr height="21">
			<td height="21" style="height:21px;width:248px;">Photo Resist for EBL</td>
			<td style="width:175px;">TOK</td>
			<td style="width:255px;">TDUR-P-015</td>
			<td></td>
		</tr>
		<tr height="21">
			<td height="21" style="height:21px;width:248px;">Plasma Cleaner</td>
			<td style="width:175px;">Harrick Plasma</td>
			<td style="width:255px;">PDC-32G</td>
			<td>Oxygen plasma</td>
		</tr>
	</tbody>
</table>

a standard and reliable method to fabricate two-dimensional nanoelectronics

Two-dimensional (2D) materials have attracted huge attention due to their unique properties and potential applications. Since wafer scale synthesis of 2D materials is still in nascent stages, scientists cannot fully rely on traditional semiconductor techniques for related research. Delicate processes from locating the materials to electrode definition need to be well controlled. In this article, a universal fabrication protocol required in manufacturing nanoscale electronics, such as 2D quasi-heterojunction bipolar transistors (Q-HBT), and 2D back-gated transistors are demonstrated. This protocol includes the determination of material position, electron beam lithography (EBL), metal electrode definition, et al. A step by step narrative of the fabrication procedures for these devices are also presented. Furthermore, results show that each of the fabricated devices has achieved high performance with high repeatability. This work reveals a comprehensive description of process flow for preparing 2D nano-electronics, enables the research groups to access this information, and pave the way toward future electronics.

The device fabrication processes have been applied to several of the corresponding author&#39;s researches involving the development of 2D material devices. In this part, the results of some of these researches are presented to demonstrate the effectivity of the protocol discussed above. A monolayer of lateral WSe2-MoS2 Q-HBT20 is selected as the first example. Using the standard device fabrication processes detailed in the protocol, the monolayer lateral WSe2-MoS2 heterojunctions were grown (Figure 2a) and then proceeded by the formation of the Q-HBT. Metal contacts were deposited on top of the lateral heterojunction to complete the Q-HBT. Ti/Au were deposited on top of the MoS2 layer (Figure 2c), followed by the deposition of Pd/Au on top of the WSe2 layer (Figure 2d). Several lateral Q-HBT were developed, such as the one with an n-p-n-p lateral heterojunction illustrated in (Figure 2d, 2e). The function of the Q-HBT device was verified by looking into its characteristic curves such as its output (IC-VCE) curve at common-emitter configuration (Figure 2f). Figure 2f shows that the lateral n-p-n Q-HBT works under two operating modes - the saturation mode and the active mode - which proves that the Q-HBT that was built using the fabrication process, indeed, functions as a transistor.
The process was also used to build 2D back-gated devices for MoS2 piezotronic strain/force sensor21 application. High-quality triangular monolayer MoS2 films were first synthesized using CVD in a sapphire substrate and then transferred into a Si/SiO2 substrate. The rest of the process of making the MoS2 film into a piezotronic device is discussed in the protocol section. Figure 3a shows an atomic force microscopy (AFM) image of a completed device consisting of a triangular MoS2 monolayer and several sets of source/drain (S-D) Au electrodes. To study the piezoelectric polarization direction, multiple contact electrodes around the triangle shape were intentionally designed. Figure 3b presents the schematic diagram of the piezotronic sensor device and the setup showing how a mechanical load is applied by an AFM tip to test its piezoelectric effect. Results in Figure 3c show that the sensor device&#39;s current flowing through one of its S-D electrode pairs decreases for every increase in applied force and vice versa, which is an expected behavior for a piezo sensor. Furthermore, the data in Figure 3d implies that the developed sensor is stable since a repeating application of applied force/strain barely changed its output current or response.
<img alt="Figure 1" class="xfigimg" src="/files/ftp_upload/57885/57885fig1.jpg" /> 
Figure 1. Schematic process flow of 2D electronic devices. The blue arrows represent the fabrication process flow of Q-HBT and brown for 2D back-gated transistor. Inset: (a) the 2D material on sapphire substrate coated with PMMA; (b) a sample heated while soaked in ammonia solution; (c) schematic diagram of a 2D material after metal deposition and lift-off process. <a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/57885/57885fig1large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Figure 2" class="xfigimg" src="/files/ftp_upload/57885/57885fig2.jpg" /> 
Figure 2. Two-dimensional lateral Q-HBT. (a). Phase image of AFM. The phase image shows clear contrast between WSe2 and MoS2. (b). The optical micrograph of a lateral heterostructure ribbon where n-type material is MoS2 and p-type material is WSe2. (c). The optical micrograph of the metal Ti/Au deposited on top of MoS2 in the lateral heterostructure ribbon. Note that this image has the same scale as in (d). (d). The optical micrograph of the lateral Q-HBT, showing an n&#8722;p&#8722;n&#8722;p lateral heterojunction. Black dashed box marks the position of the lateral heterostructure ribbon. (e). Schematic plot of a 2D Q-HBT. The yellow ribbons are MoS2 monolayers and the red ribbon is WSe2 monolayer. Ti/Au metal layers are designed to deposit on MoS2 while Pd/Au contacts with WSe2. (f). The output characteristics of the lateral n&#8722;p&#8722;n Q-HBT at different VBE values. Reprinted with permission from Blaschke, B. M., et al.10. <a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/57885/57885fig2large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Figure 3" class="xfigimg" src="/files/ftp_upload/57885/57885fig3.jpg" /> 
Figure 3. The MoS2 monolayer device. (a). AFM image of the MoS2 monolayer device. (b). Schematic illustration of a MoS2 device showing how a mechanical load is applied by an AFM tip to test its piezoelectric effect. (c).&#160;I-Vb characteristics of the MoS2 device at different applied forces under compressive strain when applying forces at locations denoted in upper inset resulting in compressive strain as shown schematically in lower insets. (d). Current response of CVD monolayer MoS2 device at repeated compressive strains at a fixed bias voltage of 1 V. Reprinted with permission from Lan, Y. W., et al.8.&#160;<a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/57885/57885fig3large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>

Watch this Scientific Journal Video about A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics at JoVE.com

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics

The article aims to introduce a standard and reliable fabrication procedure for the development of future low dimensional nanoelectronics.

Two-dimensional (2D) materials have attracted huge attention due to their unique properties and potential applications. Since wafer scale synthesis of 2D ...

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9.5K Views.  National Taiwan Normal University. The article aims to introduce a standard and reliable fabrication procedure for the development of future low dimensional nanoelectronics. 

Video: A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics

A Method to Fabricate Disconnected Silver Nanostructures in 3D

The standard nanofabrication toolkit includes techniques primarily aimed at creating 2D patterns in dielectric media. Creating metal patterns on a submicron scale requires a combination of nanofabrication tools and several material processing steps. For example, steps to create planar metal structures using ultraviolet photolithography and electron-beam lithography can include sample exposure, sample development, metal deposition, and metal liftoff. To create 3D metal structures, the sequence is repeated multiple times. The complexity and difficulty of stacking and aligning multiple layers limits practical implementations of 3D metal structuring using standard nanofabrication tools. Femtosecond-laser direct-writing has emerged as a pre-eminent technique for 3D nanofabrication.1,2 Femtosecond lasers are frequently used to create 3D patterns in polymers and glasses.3-7 However, 3D metal direct-writing remains a challenge. Here, we describe a method to fabricate silver nanostructures embedded inside a polymer matrix using a femtosecond laser centered at 800 nm. The method enables the fabrication of patterns not feasible using other techniques, such as 3D arrays of disconnected silver voxels.8 Disconnected 3D metal patterns are useful for metamaterials where unit cells are not in contact with each other,9 such as coupled metal dot10,11or coupled metal rod12,13 resonators. Potential applications include negative index metamaterials, invisibility cloaks, and perfect lenses.
In femtosecond-laser direct-writing, the laser wavelength is chosen such that photons are not linearly absorbed in the target medium. When the laser pulse duration is compressed to the femtosecond time scale and the radiation is tightly focused inside the target, the extremely high intensity induces nonlinear absorption. Multiple photons are absorbed simultaneously to cause electronic transitions that lead to material modification within the focused region. Using this approach, one can form structures in the bulk of a material rather than on its surface.
Most work on 3D direct metal writing has focused on creating self-supported metal structures.14-16 The method described here yields sub-micrometer silver structures that do not need to be self-supported because they are embedded inside a matrix. A doped polymer matrix is prepared using a mixture of silver nitrate (AgNO3), polyvinylpyrrolidone (PVP) and water (H2O). Samples are then patterned by irradiation with an 11-MHz femtosecond laser producing 50-fs pulses. During irradiation, photoreduction of silver ions is induced through nonlinear absorption, creating an aggregate of silver nanoparticles in the focal region. Using this approach we create silver patterns embedded in a doped PVP matrix. Adding 3D translation of the sample extends the patterning to three dimensions.

Femtosecond-laser direct-writing is frequently used to create three-dimensional (3D) patterns in polymers and glasses. However, patterning metals in 3D remains a challenge. We describe a method for fabricating silver nanostructures embedded inside a polymer matrix using a femtosecond laser centered at 800 nm.

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Nanomoulding of Functional Materials, a Versatile Complementary Pattern Replication Method to Nanoimprinting

We describe a nanomoulding technique which allows low-cost nanoscale patterning of functional materials, materials stacks and full devices. Nanomoulding combined with layer transfer enables the replication of arbitrary surface patterns from a master structure onto the functional material. Nanomoulding can be performed on any nanoimprinting setup and can be applied to a wide range of materials and deposition processes. In particular we demonstrate the fabrication of patterned transparent zinc oxide electrodes for light trapping applications in solar cells.

We describe a nanomoulding technique which allows low-cost nanoscale patterning of functional materials, materials stacks and full devices. Nanomoulding can be performed on any nanoimprinting setup and can be applied to a wide range of materials and deposition processes.

We describe a nanomoulding technique which  allows low-cost nanoscale patterning of functional materials, materials stacks  and full devices. Nanomoulding ...

A Method for Studying the Temperature Dependence of Dynamic Fracture and Fragmentation

The dynamic fracture of a body is a late-stage phenomenon typically studied under simplified conditions, in which a sample is deformed under uniform stress and strain rate. This can be produced by evenly loading the inner surface of a cylinder. Due to the axial symmetry, as the cylinder expands the wall is placed into a tensile hoop stress that is uniform around the circumference. While there are various techniques to generate this expansion such as explosives, electromagnetic drive, and existing gas gun techniques they are all limited in the fact that the sample cylinder must be at room temperature. We present a new method using a gas gun that facilitates experiments on cylinders from 150 K to 800 K with a consistent, repeatable loading. These highly diagnosed experiments are used to examine the effect of temperature on the fracture mechanisms responsible for failure, and their resulting influence on fragmentation statistics. The experimental geometry employs a steel ogive located inside the target cylinder, with the tip located about halfway in. A single stage light gas gun is then used to launch a polycarbonate projectile into the cylinder at 1,000 m/sec-1. The projectile impacts and flows around the rigid ogive, driving the sample cylinder from the inside. The use of a non-deforming ogive insert allows us to install temperature control hardware inside the rear of the cylinder. Liquid nitrogen (LN2) is used for cooling and a resistive high current load for heating. Multiple channels of upshifted photon Doppler velocimetry (PDV) track the expansion velocity along the cylinder enabling direct comparison to computer simulations, while High speed imaging is used to measure the strain to failure. The recovered cylinder fragments are also subject to optical and electron microscopy to ascertain the failure mechanism.

Fracture and fragmentation are late stage phenomena in dynamic loading scenarios and are typically studied using explosives. We present a technique for driving expansion using a gas gun which uniquely enables control of both loading rate and sample temperature.

The dynamic fracture of a body is a late-stage phenomenon typically studied under simplified conditions, in which a sample is deformed under uniform ...

A Cost-effective and Reliable Method to Predict Mechanical Stress in Single-use and Standard Pumps

Pumps are mainly used when transferring sterile culture broths in biopharmaceutical and biotechnological production processes. However, during the pumping process shear forces occur which can lead to qualitative and/or quantitative product loss. To calculate the mechanical stress with limited experimental expense, an oil-water emulsion system was used, whose suitability was demonstrated for drop size detections in bioreactors1. As drop breakup of the oil-water emulsion system is a function of mechanical stress, drop sizes need to be counted over the experimental time of shear stress investigations. In previous studies, the inline endoscopy has been shown to be an accurate and reliable measurement technique for drop size detections in liquid/liquid dispersions. The aim of this protocol is to show the suitability of the inline endoscopy technique for drop size measurements in pumping processes. In order to express the drop size, the Sauter mean diameter d32 was used as the representative diameter of drops in the oil-water emulsion. The results showed low variation in the Sauter mean diameters, which were quantified by standard deviations of below 15%, indicating the reliability of the measurement technique.

Shear stress investigations on an oil-water emulsion system result in drop breakup over the experimental time. To count drop sizes in pumping processes, the suitability of inline endoscopy was successfully demonstrated in this protocol.

Pumps are mainly used when transferring sterile culture broths in biopharmaceutical and biotechnological production processes. However, during the pumping ...

Standardized Method for Measuring Collection Efficiency from Wipe-sampling of Trace Explosives

One of the limiting steps to detecting traces of explosives at screening venues is effective collection of the sample. Wipe-sampling is the most common procedure for collecting traces of explosives, and standardized measurements of collection efficiency are needed to evaluate and optimize sampling protocols. The approach described here is designed to provide this measurement infrastructure, and controls most of the factors known to be relevant to wipe-sampling. Three critical factors (the applied force, travel distance, and travel speed) are controlled using an automated device. Test surfaces are chosen based on similarity to the screening environment, and the wipes can be made from any material considered for use in wipe-sampling. Particle samples of the explosive 1,3,5-trinitroperhydro-1,3,5-triazine (RDX) are applied in a fixed location on the surface using a dry-transfer technique. The particle samples, recently developed to simulate residues made after handling explosives, are produced by inkjet printing of RDX solutions onto polytetrafluoroethylene (PTFE) substrates. Collection efficiency is measured by extracting collected explosive from the wipe, and then related to critical sampling factors and the selection of wipe material and test surface. These measurements are meant to guide the development of sampling protocols at screening venues, where speed and throughput are primary considerations.

Optimized sampling protocols and the development of new wipe materials can be facilitated by standardized measurements of collection efficiency from wipe-sampling. Our approach for sampling trace explosives uses an automated device to control speed, force, and distance during wipe-sampling followed by extraction of collected explosives.

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Scalable Quantum Integrated Circuits on Superconducting Two-Dimensional Electron Gas Platform

To form a coherent quantum transport in hybrid superconductor-semiconductor (S-Sm) junctions, the formation of a homogeneous and barrier-free interface between two different materials is necessary. The S-Sm junction with high interface transparency will then facilitate the observation of the induced hard superconducting gap, which is the key requirement to access the topological phases (TPs) and observation of exotic quasiparticles such as Majorana zero modes (MZM) in hybrid systems. A material platform that can support observation of TPs and allows the realization of complex and branched geometries is therefore highly demanding in quantum processing and computing science and technology. Here, we introduce a two-dimensional material system and study the proximity induced superconductivity in semiconducting two-dimensional electron gas (2DEG) that is the basis of a hybrid quantum integrated circuit (QIC). The 2DEG is a 30 nm thick In0.75Ga0.25As quantum well that is buried between two In0.75Al0.25As barriers in a heterostructure. Niobium (Nb) films are used as the superconducting electrodes to form Nb- In0.75Ga0.25As -Nb Josephson junctions (JJs) that are symmetric, planar and ballistic. Two different approaches were used to form the JJs and QICs. The long junctions were fabricated photolithographically, but e-beam lithography was used for short junctions&#8217; fabrication. The coherent quantum transport measurements as a function of temperature in the presence/absence of magnetic field B are discussed. In both device fabrication approaches, the proximity induced superconducting properties were observed in the In0.75Ga0.25As 2DEG. It was found that e-beam lithographically patterned JJs of shorter lengths result in observation of induced superconducting gap at much higher temperature ranges. The results that are reproducible and clean suggesting that the hybrid 2D JJs and QICs based on In0.75Ga0.25As quantum wells could be a promising material platform to realize the real complex and scalable electronic and photonic quantum circuitry and devices.

Quantum integrated circuits (QICs) consisting of array of planar and ballistic Josephson junctions (JJs) based on In0.75Ga0.25As two-dimensional electron gas (2DEG) is demonstrated. Two different methods for fabrication of the two-dimensional (2D) JJs and QICs are discussed followed by the demonstration of quantum transport measurements in sub-Kelvin temperatures.

To form a coherent quantum transport in hybrid superconductor-semiconductor (S-Sm) junctions, the formation of a homogeneous and barrier-free interface ...