The authors would like to thank Paul Ciszek and Keith Emery from the National Renewable Energy Laboratory (NREL) for certified&#160;J-V&#160;measurements, Riley Brandt (MIT) for photoelectron spectroscopy measurements, and Jeff Cotter (ASU) for inspiration for the hypothesis testing section. This work is supported by the U.S. Department of Energy through the SunShot Initiative under contract DE-EE0005329, and by Robert Bosch LLC through the Bosch Energy Research Network under grant 02.20.MC11. V. Steinmann, R. Jaramillo, and K. Hartman acknowledge the support of, the Alexander von Humboldt foundation, a DOE EERE Postdoctoral Research Award, and Intel PhD Fellowship, respectively. This work made use of the Center for Nanoscale Systems at Harvard University which is supported by the National Science Foundation under award ECS-0335765.

1. Substrate Selection and Cutting
<ol>
	<li>Purchase polished Si wafers with a thick thermal oxide. For the devices reported here, use 500 &#956;m thick wafers with a 300 nm or thicker thermal oxide. The substrate selection criteria are discussed in the Discussion section.</li>
	<li>Spin coat the polished side of wafer with a typical positive photoresist (SPR 700 or PMMA A. 495) and soft bake (30 sec at 100 &#176;C). 
	Note: This is a protective layer to prevent damage or contamination during the subsequent cutting step.</li>
	<li>Use a die saw to cut the wafer into 1&#8221; &#215; 1&#8221; (25.4 x 25.4 mm2) square substrates.</li>
</ol>
2. Substrate Cleaning
<ol>
	<li>Remove particulates and other residue that result from cutting step using a compressed nitrogen gun, followed by an ultrasonic bath in de-ionized (DI) water for 5 min at 45 &#8211; 60 &#176;C.</li>
	<li>Remove the photoresist layer with an ultrasonic bath in acetone for 5 min at 45 &#8211; 60 &#176;C.</li>
	<li>Clean the exposed substrate with 3 subsequent ultrasonic baths, all for 5 min at 45 &#8211; 60 &#176;C: acetone, ethanol, and isopropyl alcohol. Finish by drying with a compressed nitrogen gun, while substrates remain in the quartz carrier.</li>
</ol>
3. Mo Sputtering
<ol>
	<li>Load the clean Si / SiO2 substrates into a high vacuum sputtering system. Ensure that the substrate plate is unheated and substrate rotation is enabled. For the devices reported here, process in a commercial system with tilted magnetron guns with 2&#8221; targets and a throw distance of approximately 4&#8221;.</li>
	<li>Deposit the first layer (the adhesion layer) at relatively high background pressure such as 10 mTorr of Ar. For the devices reported here, process with a sputtering power of 180 W (DC), which gives a growth rate of 2.6 &#197;/sec, and a first Mo layer that is 360 nm thick.</li>
	<li>Deposit the second layer (the conductive layer) at a relatively low background pressure such as 2 mTorr of Ar. Use the same sputtering power as the first layer (180 W) and deposit the same thickness. 
	Note: The devices reported here had a second Mo layer that was 360 nm thick, same as the first layer.</li>
	<li>After Mo deposition, store the substrates under vacuum until the SnS deposition step.</li>
</ol>
4. SnS Deposition
Note: The ALD deposition technique is described in sub-section 4.1, and the TE deposition is described in sub-section 4.2. The ALD deposition system is shown in Figure 2, and TE deposition system is shown in Figure 3.
<ol>
	<li>Deposit SnS by ALD
	<ol>
		<li>Before loading into the reactor, put Mo substrates in a UV ozone cleaner for 5 min to remove organic particles. Then place the substrates on the substrate holder and insert into the deposition zone.</li>
		<li>Stabilize the furnace temperature at 200 &#176;C before starting deposition.</li>
		<li>Grow SnS thin films from the reaction of bis(N,N&#8217;-diisopropylacetamidinato)-tin(II) [Sn(MeC(N-iPr)2)2, referred to here as Sn(amd)2] and hydrogen sulfide (H2S)4.
		<ol>
			<li>Keep the Sn(amd)2 precursor at a constant temperature of 95 &#176;C. Use pure N2 gas to assist the delivery of Sn(amd)2 vapor from the container in the oven to the deposition zone. During each ALD cycle, supply three doses of Sn(amd)2 precursor for total exposure of 1.1 Torr second.</li>
			<li>Use a gas mixture of 4% H2S in N2 as the sulfur source. Ensure that the exposure to the hydrogen sulfide vapor is 1.5 Torr second per dose. Ensure that the partial pressure of H2S and the total pressure of H2S in N2 are 0.76 Torr and 19 Torr, respectively.</li>
		</ol>
		</li>
		<li>Set the pumping time between Sn precursor dose and H2S dose to be only 1 sec (short compared to most other conventional ALD procedures) in order to speed up the deposition. 
		Note: Because the Sn precursor is not completely removed by this short pumping time, some residual Sn precursor remains when the H2S arrives. Thus the process could be described as a pulsed CVD process. The growth rate of SnS film is 0.33 &#197;/cycle, or 0.04 &#197;/sec.</li>
	</ol>
	</li>
	<li>Deposit SnS by TE
	<ol>
		<li>Ensure that the process chamber pressure is 2 x 10-7 Torr or lower. Load substrates into the chamber through the load lock. Hold the substrates to the plate either with a single clip, or with a custom substrate holder with appropriately sized pockets that is screwed down to the substrate plate.</li>
		<li>Ramp the source and substrate heaters to their setpoints. For the device reported here the substrate temperature is 240 &#176;C and the growth rate is 1 &#197;/sec; to achieve this growth rate set the source temperature in the range 550 &#8211; 610 &#176;C (the required source temperature increases with time for a single load of source powder). The target film thickness is 1,000 nm.</li>
		<li>Measure deposition rate using the quartz crystal monitor (QCM) before and after the SnS film deposition by moving the QCM arm into the process chamber. For this measurement the substrate is raised so that the QCM can be moved into the substrate growth position. 
		Note: The deposition rate remains fairly constant throughout a deposition time of 3 hr (&#177;0.05 &#197;/sec deviation).</li>
		<li>After deposition, transfer the samples back into the load lock before venting to air. Quickly transport the samples through air into storage either in vacuum or in an inert atmosphere glovebox before the next processing step. 
		Note: The typical unintentional air exposure time is approximately 3 min. The typical storage time is between a day and a week.</li>
	</ol>
	</li>
</ol>
5. SnS Annealing
Note: This step is performed slightly differently for ALD and TE solar cells. The annealing procedure for ALD solar cells is described in sub-section 5.1, and the procedure for TE solar cells is described in sub-section 5.2. The purpose of annealing is discussed in the Discussion section.
<ol>
	<li>Anneal the ALD-grown SnS films in H2S gas. 
	Note: This step is performed in the same system used for ALD growth.
	<ol>
		<li>Use pure H2S gas (99.5% pure) at a flow rate of 40 sccm and pressure of 10 Torr.</li>
		<li>Heat the SnS film to a temperature of 400 &#176;C and hold for 1 hr in the H2S gas environment. Ensure that the gas is flowing throughout the whole process, including temperature ramping up and down.</li>
	</ol>
	</li>
	<li>Anneal the TE-grown SnS films in H2S gas. Perform this step in a dedicated tube furnace.
	<ol>
		<li>Load the samples onto a clean quartz plate and slide into the hot-zone region of the furnace.</li>
		<li>After the furnace is sealed, purge three times with pure N2 and allow to pump down to base pressure.</li>
		<li>Establish gas flow at 100 sccm of 4% H2S at 28 Torr.</li>
		<li>Ramp the temperature to 400 &#176;C over 10 min. Hold at 400 &#176;C for 1 hr, then allow the samples to cool unassisted in the hot-zone. Maintain constant H2S gas flow and pressure until samples cool below 60 &#176;C. Remove the samples and either proceed immediately to the next step, or place them into storage in an inert gas glove box.</li>
	</ol>
	</li>
</ol>
6. SnS Surface Passivation with a Native Oxide
Note: This step is performed slightly differently for ALD and TE solar cells. In sub-section 6.1 the surface passivation procedure for ALD solar cells is described, and the procedure for TE solar cells is described in sub-section 6.2. The function of this step is further discussed in the Discussion section.
<ol>
	<li>For the ALD-grown samples, grow a thin layer of SnO2 by ALD. 
	Note: We use a different reactor than that used for SnS growth.
	<ol>
		<li>Grow SnO2 by the reaction of cyclic amide of tin [(1,3-bis(1,1-dimethylethyl)-4,5-dimethyl-(4R,5R)-1,3,2-diazastannolidin-2-ylidene)Sn(II)] and hydrogen peroxide (H2O2). Store the cyclic amide tin precursor in an oven at 43 &#176;C, and the H2O2 in a bubbler at RT.</li>
		<li>Maintain substrate temperature at 120 &#176;C for deposition.</li>
		<li>Expose the tin precursor and H2O2 using 0.33 and 1.5 Torr second per cycle, respectively, for a total of 5 cycles. Check that the thickness of the resulting SnO2 is 0.6 0.7 nm, as measured by X-ray photoelectron spectroscopy (XPS) analysis10.</li>
	</ol>
	</li>
	<li>For the TE-grown samples, form a thin layer of SnO2 by air exposure.
	<ol>
		<li>Expose the samples to lab ambient air for 24 hr. Check that the thickness of the resulting SnO2 is approximately 0.5 nm, as measured by XPS analysis. 
		Note: The typical RT is 24 &#177; 1 &#176;C, and the typical humidity is 45% &#177; 13% (higher in the summer); for the devices reported here, the values were 24.6 &#730;C and &#60; 30%, respectively.</li>
	</ol>
	</li>
</ol>
7. Deposition of the Zn(O,S) / ZnO Buffer Layer
Note: This step is performed in the same ALD chamber that is used for SnS growth by ALD.
<ol>
	<li>Grow a Zn(O,S):N layer by ALD.
	<ol>
		<li>Maintain the substrate temperature at 120 &#176;C.</li>
		<li>Grow Zn(O,S):N by ALD from the reaction of diethylzinc (Zn(C2H5)2, DEZ), deionized water (H2O), 4% H2S in N2, and ammonia (NH3)11. Store the bubbler containing DEZ at RT. Use a cycle sequence of [DEZ-H2O-DEZ-NH3]14-[DEZ-H2S]1, and repeat this super cycle 12 times. Ensure that the exposure of ammonia is 11 Torr second.</li>
		<li>Check that the S/Zn ratio in the resulting film is 0.14, as measured by Rutherford backscattering spectroscopy12, and that the thickness of the film is approximately 36 nm.</li>
	</ol>
	</li>
	<li>Grow a ZnO layer by ALD.
	<ol>
		<li>Maintain the substrate temperature at 120 &#176;C.</li>
		<li>Grow ZnO with 50 ALD cycles of DEZ-H2O. 
		Note: The thickness of the resulting ZnO film is approximately 18 nm.</li>
	</ol>
	</li>
</ol>
8. Deposition of the Transparent Conducting Oxide (TCO), Indium Tin Oxide (ITO)
<ol>
	<li>Cut ITO shadow masks from a 0.024&#8221; (610 &#956;m) aluminum 6061 sheet using a laboratory laser cutter. 
	Note: The masks define 11 rectangular devices that are 0.25 cm2 in size plus a larger pad in one corner that is used for optical reflectivity measurements, see Figure 4.</li>
	<li>Mount the devices and masks in a mask aligner. 
	Note: This is an aluminum plate with nested pockets for the substrate and masks and clips to secure the masks in place.</li>
	<li>Deposit ITO by reactive magnetron sputtering.
	<ol>
		<li>Heat the substrate to approximately 80 &#8211; 90 &#730;C and enable substrate rotation.</li>
		<li>Use a 2 inch diameter ITO target (In2O3/SnO2 90/10 wt.%, 99.99% pure) at 65 W RF sputtering power with 40 / 0.1 sccm Ar / O2 gas flow at 4 mTorr total pressure.</li>
		<li>Grow a 240 nm thick ITO film. 
		Note: With these parameters, growth rates of 0.5 &#197;/sec and sheet resistances in the range 40 &#8211; 60 &#937;/sq are achieved.</li>
	</ol>
	</li>
</ol>
9. Metallization
<ol>
	<li>Cut metallization shadow masks from a 127 &#956;m thick austenitic stainless steel sheet. 
	Note: These masks are cut with +10/-5 &#181;m tolerance by a commercial company. The metal pattern consists of 2 fingers separated by 1.5 mm, each 7 mm long, and a 1 x 1 mm2 contact pad, see Figure 4.</li>
	<li>Mount the devices and masks in a mask aligner, as in Step 8.2.</li>
	<li>Deposit Ag (for TE devices) or Ni/Al (for ALD devices) by electron-beam evaporation.
	<ol>
		<li>Mount mask aligner onto the substrate plate of an electron beam metals evaporation system. Pump down to a base pressure below 1 x 10-6 Torr.</li>
		<li>Evaporate metal at a rate of 2 &#197;/sec. Deposit 500 nm total metal thickness.</li>
	</ol>
	</li>
</ol>
10. Device Characterization
<ol>
	<li>Perform current-voltage (&#8220;J-V&#8221;) measurements on all devices in the dark and in AM1.5 simulated solar light.
	<ol>
		<li>Calibrate the solar simulator by collecting J-V data from a calibrated silicon solar cell and adjusting the solar simulator lamp power and height until reaching the calibrated current value for AM1.5 insolation.</li>
		<li>Contact the devices in four-wire mode by using copper beryllium double probe tips to contact to both the top (anode, Ag or Al) and bottom (cathode, Mo) layers. Contact the bottom layer by scratching away the buffer and SnS layers with a scalpel blade.</li>
		<li>Measure light and dark J-V data using a source-meter by sourcing voltage and measuring current. 
		Note: Devices are typically measured within the range &#177;0.5 V. The devices are not responsive to the direction or rate of the voltage sweeps. For routine testing an area-defining light aperture is not used, see Discussion section for further details.</li>
	</ol>
	</li>
	<li>Perform external quantum efficiency (EQE) measurements on all devices, with variable light and voltage bias.
	<ol>
		<li>Calibrate the EQE system by measuring the response of a Si calibration photodiode. 
		Note: The software compares this data to measurements performed with a NIST-backed standard to adjust the light level accordingly.</li>
		<li>Contact the devices using the four-wire method, as in step 10.1.2.</li>
		<li>Measure EQE using a commercial system which illuminates the sample with monochromatic light chopped at 100 Hz over a wavelength range of 270 1,100 nm and measures the resulting current. Perform this measurement according to the manufacturer&#8217;s standard operating procedure.</li>
		<li>Repeat the EQE measurement with variable voltage and white light bias. Use a sourcemeter to supply the voltage bias, and a halogen lamp to supply the light bias. Measure devices in both forward and reverse voltage bias, and under variable white light intensity up to ~1 Suns.</li>
		<li>Measure optical reflectance (%R) of the ITO top surface using a spectrophotometer with an integrating sphere in order to convert external to internal quantum efficiency (IQE). Perform this measurement according to the manufacturer&#8217;s standard operating procedure.</li>
	</ol>
	</li>
</ol>

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The authors have nothing to disclose.

Thin film photovoltaics (PV) continue to attract interest and significant research activity. However, the economics of the PV market are shifting rapidly and developing commercially successful thin film PV has become a more challenging prospect. Manufacturing cost advantages over wafer-based technologies can no longer be taken for granted, and improvements in both efficiency and cost must be sought on an equal footing.1,2 In light of this reality we have chosen to develop SnS as an absorber material for thin film PV. SnS has intrinsic practical advantages that could translate into low manufacturing cost. If high efficiencies can be demonstrated, it could be considered as a drop-in replacement for CdTe in commercial thin film PV. Here, the fabrication procedure for the recently reported record SnS solar cells is demonstrated. We focus on practical aspects such as substrate selection, deposition conditions, device layout, and measurement protocols.
SnS is composed of non-toxic, Earth-abundant and inexpensive elements (tin and sulfur). SnS is an inert and insoluble semiconducting solid (mineral name Herzenbergite) with an indirect bandgap of 1.1 eV, strong light absorption for photons with energy above 1.4 eV (&#945; &#62; 104 cm-1), and intrinsic p-type conductivity with carrier concentration in the range 1015&#160;&#8211; 1017 cm-3.3&#8211;7 Importantly, SnS evaporates congruently and is phase-stable up to 600 &#176;C.8,9 This means that SnS can be deposited by thermal evaporation (TE) and its high-speed cousin, closed space sublimation (CSS), as is employed in the manufacture of CdTe solar cells. It also means that SnS phase control is far simpler than for most thin film PV materials, notably including Cu(In,Ga)(S,Se)2 (CIGS) and Cu2ZnSnS4 (CZTS). Therefore, cell efficiency stands as the primary barrier to commercialization of SnS PV, and SnS could be considered a drop-in replacement for CdTe once high efficiencies are demonstrated at the laboratory scale. However this efficiency barrier cannot be overstated. We estimate that the record efficiency must increase by a factor of four, from ~4% to ~15%, in order to stimulate commercial development. Developing SnS as a drop-in replacement for CdTe will also require growth of high quality SnS thin films by CSS, and the development of an n-type partner material on which SnS can be grown directly.
Below is described the step-by-step procedure for fabricating record SnS solar cells using two different deposition techniques, atomic layer deposition (ALD) and TE. ALD is a slow growth method but to-date has yielded the highest efficiency devices. TE is faster and industrially scalable, but lags ALD in efficiency. In addition to the different SnS deposition methods, the TE and ALD solar cells differ slightly in the annealing, surface passivation, and metallization steps. The device fabrication steps are enumerated in Figure 1.
After describing the procedure, test results for the certified record devices and related samples are presented. The record results have been reported previously. Here the focus is on the distribution of results for a typical processing run.

<table><tbody><tr><td>Quartz wafer carrier</td><td>AM Quartz, Gainesville, TX</td><td></td><td>bespoke design</td></tr><tr><td>Sputtering system</td><td>PVD Products</td><td></td><td>High vacuum sputtering system with load lock</td></tr><tr><td>4% H&lt;sub&gt;2&lt;/sub&gt;S in N&lt;sub&gt;2&lt;/sub&gt;</td><td>Airgas Inc.</td><td>X02NI96C33A5626</td><td></td></tr><tr><td>99.5% H&lt;sub&gt;2&lt;/sub&gt;S</td><td>Matheson Trigas</td><td>G1540250</td><td></td></tr><tr><td>SnS powder</td><td>Sigma Aldrich</td><td>741000-5G</td><td></td></tr><tr><td>Effusion cell</td><td>Veeco</td><td>35-LT</td><td>Low temperature, single filament effusion cell</td></tr><tr><td>diethylzinc (Zn(C&lt;sub&gt;2&lt;/sub&gt;H&lt;sub&gt;5&lt;/sub&gt;)&lt;sub&gt;2&lt;/sub&gt;)</td><td>Strem Chemicals</td><td>93-3030</td><td></td></tr><tr><td>Laser cutter</td><td>Electrox</td><td>Scorpian G2</td><td>Used for ITO shadow masks</td></tr><tr><td>ITO sputtering target (In&lt;sub&gt;2&lt;/sub&gt;O&lt;sub&gt;3&lt;/sub&gt;/SnO&lt;sub&gt;2&lt;/sub&gt; 90/10 wt.%, 99.99% pure)</td><td>Kurt J. Lesker</td><td>EJTITOX402A4</td><td></td></tr><tr><td>Metallization shadow masks</td><td>MicroConnex</td><td></td><td>bespoke design</td></tr><tr><td>Electron Beam Evaporator</td><td>Denton</td><td></td><td>High vacuum metals evaporator with load-lock</td></tr><tr><td>AM1.5 solar simulator</td><td>Newport Oriel</td><td>91194</td><td>1,300 W Xe-lamp using an AM1.5G filter</td></tr><tr><td>Spectrophotometer</td><td>Perkin Elmer</td><td>Lambda 950 UV-Vis-NIR</td><td>150 mm Spectralon-coated integrating sphere</td></tr><tr><td>Calibrated Si solar cell</td><td>PV Measurements</td><td></td><td>BK-7 window glass</td></tr><tr><td>Double probe tips</td><td>Accuprobe</td><td>K1C8C1F</td><td></td></tr><tr><td>Souce-meter</td><td>Keithley</td><td>2400</td><td></td></tr><tr><td>Quantum efficiency measurement system</td><td>PV Measurements</td><td>QEX7</td><td></td></tr><tr><td>Calibrated Si photodiode</td><td>PV Measurements</td><td></td><td></td></tr><tr><td>High-throughput solar cell test station</td><td>PV Measurements</td><td></td><td>bespoke design</td></tr><tr><td>Inert pump oil</td><td>DuPont</td><td>Krytox</td><td>PFPE oil, grade 1514; vendor: Eastern Scientific</td></tr><tr><td>H&lt;sub&gt;2&lt;/sub&gt;S resistant elastomer o-rings</td><td>DuPont</td><td>Kalrez</td><td>compound 7075; vendor: Marco Rubber</td></tr><tr><td>H&lt;sub&gt;2&lt;/sub&gt;S resistant elastomer o-rings</td><td>Marco Rubber</td><td>Markez</td><td>compound Z1028</td></tr><tr><td>H&lt;sub&gt;2&lt;/sub&gt;S resistant elastomer o-rings</td><td>Seals Eastern, Inc.</td><td>Aflas</td><td>vendor: Marco Rubber</td></tr></tbody></table>

making record-efficiency sns solar cells by thermal evaporation and atomic layer deposition

Tin sulfide (SnS) is a candidate absorber material for Earth-abundant, non-toxic solar cells. SnS offers easy phase control and rapid growth by congruent thermal evaporation, and it absorbs visible light strongly. However, for a long time the record power conversion efficiency of SnS solar cells remained below 2%. Recently we demonstrated new certified record efficiencies of 4.36% using SnS deposited by atomic layer deposition, and 3.88% using thermal evaporation. Here the fabrication procedure for these record solar cells is described, and the statistical distribution of the fabrication process is reported. The standard deviation of efficiency measured on a single substrate is typically over 0.5%. All steps including substrate selection and cleaning, Mo sputtering for the rear contact (cathode), SnS deposition, annealing, surface passivation, Zn(O,S) buffer layer selection and deposition, transparent conductor (anode) deposition, and metallization are described. On each substrate we fabricate 11 individual devices, each with active area 0.25 cm2. Further, a system for high throughput measurements of current-voltage curves under simulated solar light, and external quantum efficiency measurement with variable light bias is described. With this system we are able to measure full data sets on all 11 devices in an automated manner and in minimal time. These results illustrate the value of studying large sample sets, rather than focusing narrowly on the highest performing devices. Large data sets help us to distinguish and remedy individual loss mechanisms affecting our devices.

In Figures 6-8 results are shown for two representative &#8220;baseline&#8221; TE-grown samples as described above. Illuminated J-V data for these two samples is plotted in Figure 6. The first sample (&#8220;SnS140203F&#8221;) yielded the device with certified efficiency of 3.88% that was reported previously.9 Representative J-V distributions are also shown for each sample. For a given bias voltage, these distributions are calculated as <img alt="Equation 1" src="/files/ftp_upload/52705/52705eq1.jpg" /> where &#60;J&#62; is the average of the current density measured for all devices, &#963;J is the standard deviation of these measurements, and N is the total number of measurements. In other words, the average and the standard error are graphically represented. This representation helps with comparing results from different samples, and for visually assessing the impact of changes in device fabrication on the resulting device performance.
The J-V data suggest that the samples suffer from problems with shunt resistance that varies between devices on a sample. This conclusion is further reinforced by Figures 7 and 8. In Figure 7 the standard solar cell parameters are plotted &#8212; open circuit voltage (VOC), short circuit current density (JSC), fill factor (FF), and power conversion efficiency &#8212; for all the same devices shown in Figure 6. The bar graph representation helps to visually identify correlations between parameters. For these samples the most apparent correlation is between efficiency and the FF, as expected for devices that suffer from shunt or series resistance losses. For the second device there is also an apparent correlation between efficiency and VOC, as expected for shunt resistance losses.
These correlations are made explicit by the multivariate plots shown in Figure 8. Here, VOC, JSC, and FF are plotted against the series (Rs) and shunt (Rsh) resistances. Rs and Rsh are calculated using linear fits to the J-V data near 0.5 and 0 V, respectively. In many cases it would be better to extract Rs and Rsh as parameters in a diode model which can be fit to the J-V data. However, for relatively low efficiency solar cells there are many sources of loss, and diode models that succeed for higher efficiency devices are not reliable. Therefore it is preferred to extract Rs and Rsh by a more robust technique. Although the resulting values may not be accurate, the trends are still instructive and can be used to guide development. The data in Figure 8 confirm that shunt resistance is a major source of loss. This can be seen most clearly in the rising trend in FF (Rsh). The data show that, at the present stage of device development, the shunt resistance must be maintained greater than approximately 200 &#937; cm2 in order for efficiency gains from other process improvements to become apparent. Rs appears not to limit the devices reported here. The values for Rs are typically 0.5 &#937; cm2, and only rarely venture above 1 &#937; cm2.
Results for one representative &#8220;baseline&#8221; ALD-grown sample as described above are shown in Figure 9. The ALD devices show better performance than the TE devices, with the best device showing 4.6% efficiency. Besides the different SnS growth techniques, the two fabrication procedures differ in the SnS surface passivation by oxidation. In addition, the TE samples are exposed to laboratory air in between film growth and annealing, while the ALD samples are annealed in the growth chamber without an air break. The ALD-grown samples appear to suffer less from shunt resistance losses than the TE-grown samples. The reason for this difference is not known. It is possible that the ALD-grown SnS films are more compact, due to the self-limiting growth mode and slow growth rate, than the TE-grown films.
The certified device tests are reproduced in Figure 10.9,10 On the left is shown the certified record device using an ALD-grown SnS layer. The certified efficiency for this sample was 4.36%, and devices up to 4.54% efficient have been measured using the same fabrication procedure. On the right is shown the certified record device using a TE-grown SnS layer. The certified efficiency for this sample was 3.88%, and devices up to 4.1% have been measured with the same procedure. Note that the 3.88% certified test result is well within the range measured for the same sample, for which the average &#177; standard deviation is 3.5% &#177; 0.4%, as shown in Figure 7.
Figure 11 shows results demonstrating the stability of TE-grown SnS solar cells in ambient conditions. For select samples J-V tests were performed before and after storing for up to eleven months. The samples were stored in air and exposed to ambient light without encapsulation. All four samples shown in Figure 11 were processed slightly differently than the procedure reported here; this is for historical reasons, and there is no reason to think that the devices reported here would have different stability characteristics. The processing differences are described in the figure caption, and they account for the varying performance of the devices. The main point is that minimal degradation is observed over a year. It remains to be seen how SnS solar cells would survive more accelerated lifetime testing, such as damp heat or prolonged full spectrum illumination.
<img alt="Figure 1" src="/files/ftp_upload/52705/52705fig1.jpg" /> 
Figure 1. Device fabrication process.&#160;Enumeration of the device fabrication process, from substrate cutting (#1, bottom) to metallization (#9, top). 
<img alt="Figure 2" src="/files/ftp_upload/52705/52705fig2.jpg" /> 
Figure 2. Atomic layer deposition (ALD) system overview.&#160;(Top) ALD system schematic drawing. (Bottom) ALD system photograph, with critical components numbered and labeled. This system can perform SnS deposition, SnS annealing, and buffer layer deposition and sits in the Gordon group at Harvard University. It consists of a hot-wall deposition tube, two ovens used to store precursor, gas deliver and control system, temperature controlling system and a rotary vane mechanical vacuum pump. The substrate holder can put at most eight 1&#8221; &#215; 1&#8221; square substrates. <a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/52705/52705fig2large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Figure 3" src="/files/ftp_upload/52705/52705fig3.jpg" /> 
Figure 3. Thermal evaporation (TE) system overview.&#160;Critical components are numbered and labeled. This system is dedicated to SnS deposition and sits in the Buonassisi group at MIT. The system consists of a process chamber and a load lock. The process chamber is typically kept under high vacuum conditions (1 &#215; 10-8 Torr) and includes a shuttered substrate stage with sample rotation and radiative heating, and a shuttered effusion cell for source evaporation. The chamber also has a retractable quartz crystal monitor (QCM) located directly underneath the substrate plate to measure growth rate, and a pyrometer to measure substrate temperature. Commercially purchased SnS powder is used for the precursor, with a thermal pre-treatment described previously.9 The substrate plate holds one large device substrate (1 &#215; 1 in2) and one smaller substrate (1 &#215; 1/3 in2) which is used for SnS film measurements. The distance from the substrate to the source orifice is 10 cm. <a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/52705/52705fig3large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Figure 4" src="/files/ftp_upload/52705/52705fig4.jpg" /> 
Figure 4. Metallization pattern and sample photograph.&#160;The drawing at left shows the metallization pattern for 0.25 cm2 devices. For clarity the TCO footprint is outlined on only one device. Also shown is the location of the larger TCO pad that is used for optical reflectivity measurements. The photograph at right shows a real sample with TE-grown SnS. The scratched region at the left provides contact to the underlying Mo layer for testing. Photograph: KJ Wang. <a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/52705/52705fig4large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Figure 5" src="/files/ftp_upload/52705/52705fig5.jpg" /> 
Figure 5. Device testing with probe card. This top-down image shows a sample mounted on the test station chuck with multiple devices contacted simultaneously with the custom probe card. Only half of the sample is visible in this image. <a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/52705/52705fig5large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Figure 6" src="/files/ftp_upload/52705/52705fig6.jpg" /> 
Figure 6. J-V tests for devices on two different &#8220;baseline&#8221; TE samples. For clarity, all 12 devices on a given sample are plotted in the same color (grey or red). Also plotted are representative J-V envelopes (average &#177; standard error) for all devices on each sample, as described in the text. These measurements were performed without an area-defining light aperture. <a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/52705/52705fig6large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Figure 7" src="/files/ftp_upload/52705/52705fig7.jpg" /> 
Figure 7. Solar cell test parameters for two baseline TE samples.&#160;The test results are plotted on a single line for each device tested &#8212; 11 devices each for &#8220;SnS140203F&#8221; (top) and &#8220;SnS140306H&#8221; (bottom) &#8212; to make correlations more apparent. Above each plot is reported the best, average, standard deviation (SD), and standard error (SE) for each distribution. Note that the best Voc (for example) is the highest measured Voc, not the Voc of the most efficient device. These measurements were performed without an area-defining light aperture. <a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/52705/52705fig7large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Figure 8" src="/files/ftp_upload/52705/52705fig8.jpg" /> 
Figure 8. Series and shunt resistance multivariate plots for two baseline TE samples. The devices represented are the same reported in Figures 6-7. The series (Rs) and shunt (Rsh) resistances are calculated as described in the text. <a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/52705/52705fig8large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Figure 9" src="/files/ftp_upload/52705/52705fig9.jpg" /> 
Figure 9. J-V tests and test parameters for one baseline ALD sample.&#160;(Top) The J-V curves show good peak performance, but some devices clearly suffer from low shunt resistance. (Bottom) The test parameters show a strong correlation between efficiency and the FF, consistent with shunt resistance losses. These measurements were performed without an area-defining light aperture. <a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/52705/52705fig9large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Figure 10" src="/files/ftp_upload/52705/52705fig10.jpg" /> 
Figure 10. Certification results for ALD- and TE-grown devices.&#160;Certification performed by the PV Performance Characterization Team at the National Renewable Energy Laboratory, USA. (Left) The ALD certified record is 4.36%, as reported in Sinsermsuksakul et al.10 (Right) The TE certified record is 3.88%, as reported in Steinmann et al.9 <a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/52705/52705fig10large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Figure 11" src="/files/ftp_upload/52705/52705fig11.jpg" /> 
Figure 11. Long-time stability of SnS solar cells.&#160;J-V tests of samples that were repeatedly measured over a period of nearly a year, while being stored in air and being exposed to ambient light without encapsulation. For each panel the black curves show the initial measurement, the red curves show the final measurement, and dashed curves show. The thin lines show the best device for each test, and the thick curves are representative J-V envelopes (average &#177; standard error) for all devices on each sample as described in the text. All four panels show TE-grown samples that were processed as described in this manuscript except for the following differences: (a) No H2S annealing step. (b) Thinner absorber layer, 650 nm thick; no H2S annealing step; air exposure performed at 200 &#176;C for 30 min. (c) Thinner absorber layer, 650 nm thick; no H2S annealing step; buffer layer with higher sulfur content and no nitrogen doping. (d) Antireflection coating deposited on top of device stack. The time between measurements was 50 weeks, 48 weeks, 48 weeks, and 28 weeks for panels a, b, c, and d, respectively. <a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/52705/52705fig12large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Figure 12" src="/files/ftp_upload/52705/52705fig12.jpg" /> 
Figure 12. Visualization of spatial non-uniformity across two baseline TE samples.&#160;Results are the same as reported in Figure&#160;6-8. There are 11 devices on each sample, and each device is color coded according to the measured efficiency; the colormap is the same for both samples. Black-and-white hatching indicates either that the device was not measured, or no device was present (as one corner of each sample).
<img alt="Figure 13" src="/files/ftp_upload/52705/52705fig13.jpg" /> 
Figure 13. Illustrated example of hypothesis testing in the presence of common cause variance.&#160;Fictional characters Angela and Nessi are separately testing the hypothesis that Process B yield higher efficiency solar cells than Process A. Angela has superior process control but a slightly lower baseline efficiency than Nessi. (A,D,G) True probability distributions for Angela and Nessi&#8217;s results. (B,E,H) Individual measurements. (C,F,I) Measured distributions. With only 6 samples, Angela can reject the null hypothesis but Nessi cannot. See text for full description. <a href="https://www-jove-com.remotexs.ntu.edu.sg/files/ftp_upload/52705/52705fig13.jpg" target="_blank">Please click here to view a larger version of the figure.</a>

Watch this Scientific Journal Video about Making Record-efficiency SnS Solar Cells by Thermal Evaporation and Atomic Layer Deposition at JoVE.com

Making Record-efficiency SnS Solar Cells by Thermal Evaporation and Atomic Layer Deposition

Tin sulfide (SnS) is a candidate material for Earth-abundant, non-toxic solar cells. Here, we demonstrate the fabrication procedure of the SnS solar cells employing atomic layer deposition, which yields 4.36% certified power conversion efficiency, and thermal evaporation which yields 3.88%.

Tin sulfide (SnS) is a candidate absorber material for Earth-abundant, non-toxic solar cells. SnS offers easy phase control and rapid growth by congruent ...

making-record-efficiency-sns-solar-cells-thermal-evaporation-atomic

Nanyang Technological University

Research

JoVE Journal

Engineering

42.7K Views.  Massachusetts Institute of Technology. Tin sulfide (SnS) is a candidate material for Earth-abundant, non-toxic solar cells. Here, we demonstrate the fabrication procedure of the SnS solar cells employing atomic layer deposition, which yields 4.36% certified power conversion efficiency, and thermal evaporation which yields 3.88%.

Video: Making Record-efficiency SnS Solar Cells by Thermal Evaporation and Atomic Layer Deposition

Polycrystalline Silicon Thin-film Solar cells with Plasmonic-enhanced Light-trapping

One of major approaches to cheaper solar cells is reducing the amount of semiconductor material used for their fabrication and making cells thinner. To compensate for lower light absorption such physically thin devices have to incorporate light-trapping which increases their optical thickness. Light scattering by textured surfaces is a common technique but it cannot be universally applied to all solar cell technologies. Some cells, for example those made of evaporated silicon, are planar as produced and they require an alternative light-trapping means suitable for planar devices. Metal nanoparticles formed on planar silicon cell surface and capable of light scattering due to surface plasmon resonance is an effective approach.
The paper presents a fabrication procedure of evaporated polycrystalline silicon solar cells with plasmonic light-trapping and demonstrates how the cell quantum efficiency improves due to presence of metal nanoparticles.
To fabricate the cells a film consisting of alternative boron and phosphorous doped silicon layers is deposited on glass substrate by electron beam evaporation. An Initially amorphous film is crystallised and electronic defects are mitigated by annealing and hydrogen passivation. Metal grid contacts are applied to the layers of opposite polarity to extract electricity generated by the cell. Typically, such a ~2 &mu;m thick cell has a short-circuit current density (Jsc) of 14-16 mA/cm2, which can be increased up to 17-18 mA/cm2 (~25% higher) after application of a simple diffuse back reflector made of a white paint.
To implement plasmonic light-trapping a silver nanoparticle array is formed on the metallised cell silicon surface. A precursor silver film is deposited on the cell by thermal evaporation and annealed at 23&deg;C to form silver nanoparticles. Nanoparticle size and coverage, which affect plasmonic light-scattering, can be tuned for enhanced cell performance by varying the precursor film thickness and its annealing conditions. An optimised nanoparticle array alone results in cell Jsc enhancement of about 28%, similar to the effect of the diffuse reflector. The photocurrent can be further increased by coating the nanoparticles by a low refractive index dielectric, like MgF2, and applying the diffused reflector. The complete plasmonic cell structure comprises the polycrystalline silicon film, a silver nanoparticle array, a layer of MgF2, and a diffuse reflector. The Jsc for such cell is 21-23 mA/cm2, up to 45% higher than Jsc of the original cell without light-trapping or ~25% higher than Jsc for the cell with the diffuse reflector only.
Introduction
Light-trapping in silicon solar cells is commonly achieved via light scattering at textured interfaces. Scattered light travels through a cell at oblique angles for a longer distance and when such angles exceed the critical angle at the cell interfaces the light is permanently trapped in the cell by total internal reflection (Animation 1: Light-trapping). Although this scheme works well for most solar cells, there are developing technologies where ultra-thin Si layers are produced planar (e.g. layer-transfer technologies and epitaxial c-Si layers) 1 and or when such layers are not compatible with textures substrates (e.g. evaporated silicon) 2. For such originally planar Si layer alternative light trapping approaches, such as diffuse white paint reflector 3, silicon plasma texturing 4 or high refractive index nanoparticle reflector 5 have been suggested.
Metal nanoparticles can effectively scatter incident light into a higher refractive index material, like silicon, due to the surface plasmon resonance effect 6. They also can be easily formed on the planar silicon cell surface thus offering a light-trapping approach alternative to texturing. For a nanoparticle located at the air-silicon interface the scattered light fraction coupled into silicon exceeds 95% and a large faction of that light is scattered at angles above critical providing nearly ideal light-trapping condition (Animation 2: Plasmons on NP). The resonance can be tuned to the wavelength region, which is most important for a particular cell material and design, by varying the nanoparticle average size, surface coverage and local dielectric environment 6,7. Theoretical design principles of plasmonic nanoparticle solar cells have been suggested 8. In practice, Ag nanoparticle array is an ideal light-trapping partner for poly-Si thin-film solar cells because most of these design principle are naturally met. The simplest way of forming nanoparticles by thermal annealing of a thin precursor Ag film results in a random array with a relatively wide size and shape distribution, which is particularly suitable for light-trapping because such an array has a wide resonance peak, covering the wavelength range of 700-900 nm, important for poly-Si solar cell performance. The nanoparticle array can only be located on the rear poly-Si cell surface thus avoiding destructive interference between incident and scattered light which occurs for front-located nanoparticles 9. Moreover, poly-Si thin-film cells do not requires a passivating layer and the flat base-shaped nanoparticles (that naturally result from thermal annealing of a metal film) can be directly placed on silicon further increases plasmonic scattering efficiency due to surface plasmon-polariton resonance 10.
The cell with the plasmonic nanoparticle array as described above can have a photocurrent about 28% higher than the original cell. However, the array still transmits a significant amount of light which escapes through the rear of the cell and does not contribute into the current. This loss can be mitigated by adding a rear reflector to allow catching transmitted light and re-directing it back to the cell. Providing sufficient distance between the reflector and the nanoparticles (a few hundred nanometers) the reflected light will then experience one more plasmonic scattering event while passing through the nanoparticle array on re-entering the cell and the reflector itself can be made diffuse - both effects further facilitating light scattering and hence light-trapping. Importantly, the Ag nanoparticles have to be encapsulated with an inert and low refractive index dielectric, like MgF2 or SiO2, from the rear reflector to avoid mechanical and chemical damage 7. Low refractive index for this cladding layer is required to maintain a high coupling fraction into silicon and larger scattering angles, which are ensured by the high optical contrast between the media on both sides of the nanoparticle, silicon and dielectric 6. The photocurrent of the plasmonic cell with the diffuse rear reflector can be up to 45% higher than the current of the original cell or up to 25% higher than the current of an equivalent cell with the diffuse reflector only.

Polycrystalline silicon thin-film solar cells on glass are fabricated by deposition of boron and phosphorous doped silicon layers followed by crystallisation, defect passivation and metallisation. Plasmonic light-trapping is introduced by forming Ag nanoparticles on the silicon cell surface capped with a diffused reflector resulting in ~45% photocurrent enhancement.

One of major approaches to cheaper solar cells is reducing the amount of semiconductor material used for their fabrication and making cells thinner. To ...

Harvesting Solar Energy by Means of Charge-Separating Nanocrystals and Their Solids

Conjoining different semiconductor materials in a single nano-composite provides synthetic means for the development of novel optoelectronic materials offering a superior control over the spatial distribution of charge carriers across material interfaces. As this study demonstrates, a combination of donor-acceptor nanocrystal (NC) domains in a single nanoparticle can lead to the realization of efficient photocatalytic1-5 materials, while a layered assembly of donor- and acceptor-like nanocrystals films gives rise to photovoltaic materials.
Initially the paper focuses on the synthesis of composite inorganic nanocrystals, comprising linearly stacked ZnSe, CdS, and Pt domains, which jointly promote photoinduced charge separation. These structures are used in aqueous solutions for the photocatalysis of water under solar radiation, resulting in the production of H2 gas. To enhance the photoinduced separation of charges, a nanorod morphology with a linear gradient originating from an intrinsic electric field is used5. The inter-domain energetics are then optimized to drive photogenerated electrons toward the Pt catalytic site while expelling the holes to the surface of ZnSe domains for sacrificial regeneration (via methanol). Here we show that the only efficient way to produce hydrogen is to use electron-donating ligands to passivate the surface states by tuning the energy level alignment at the semiconductor-ligand interface. Stable and efficient reduction of water is allowed by these ligands due to the fact that they fill vacancies in the valence band of the semiconductor domain, preventing energetic holes from degrading it. Specifically, we show that the energy of the hole is transferred to the ligand moiety, leaving the semiconductor domain functional. This enables us to return the entire nanocrystal-ligand system to a functional state, when the ligands are degraded, by simply adding fresh ligands to the system4.
To promote a photovoltaic charge separation, we use a composite two-layer solid of PbS and TiO2 films. In this configuration, photoinduced electrons are injected into TiO2 and are subsequently picked up by an FTO electrode, while holes are channeled to a Au electrode via PbS layer6. To develop the latter we introduce a Semiconductor Matrix Encapsulated Nanocrystal Arrays (SMENA) strategy, which allows bonding PbS NCs into the surrounding matrix of CdS semiconductor. As a result, fabricated solids exhibit excellent thermal stability, attributed to the heteroepitaxial structure of nanocrystal-matrix interfaces, and show compelling light-harvesting performance in prototype solar cells7.

A general strategy for the development of charge-separating semiconductor nanocrystal composites deployable for solar energy production is presented. We show that assembly of donor-acceptor nanocrystal domains in a single nanoparticle geometry gives rise to a photocatalytic function, while bulk-heterojunctions of donor-acceptor nanocrystal films can be used for photovoltaic energy conversion.

Conjoining different semiconductor materials in a single nano-composite provides synthetic means for the development of novel optoelectronic materials ...

Improved Heterojunction Quality in Cu2O-based Solar Cells Through the Optimization of Atmospheric Pressure Spatial Atomic Layer Deposited Zn1-xMgxO

Atmospheric pressure spatial atomic layer deposition (AP-SALD) was used to deposit n-type ZnO and Zn1-xMgxO thin films onto p-type thermally oxidized Cu2O substrates outside vacuum at low temperature. The performance of photovoltaic devices featuring atmospherically fabricated ZnO/Cu2O heterojunction was dependent on the conditions of AP-SALD film deposition, namely, the substrate temperature and deposition time, as well as on the Cu2O substrate exposure to oxidizing agents prior to and during the ZnO deposition. Superficial Cu2O to CuO oxidation was identified as a limiting factor to heterojunction quality due to recombination at the ZnO/Cu2O interface. Optimization of AP-SALD conditions as well as keeping Cu2O away from air and moisture in order to minimize Cu2O surface oxidation led to improved device performance. A three-fold increase in the open-circuit voltage (up to 0.65 V) and a two-fold increase in the short-circuit current density produced solar cells with a record 2.2% power conversion efficiency (PCE). This PCE is the highest reported for a Zn1-xMgxO/Cu2O heterojunction formed outside vacuum, which highlights atmospheric pressure spatial ALD as a promising technique for inexpensive and scalable fabrication of Cu2O-based photovoltaics.

Improved Heterojunction Quality in Cu2O-based Solar Cells Through the Optimization of Atmospheric Pressure Spatial Atomic Layer Deposited Zn1-xMgxO

Here we present a protocol for synthesizing Zn1-xMgxO/Cu2O heterojunctions in open-air at low temperature via atmospheric pressure spatial atomic layer deposition (AP-SALD) of Zn1-xMgxO on cuprous oxide. Such high quality conformal metal oxides can be grown on a variety of substrates including plastics by this cheap and scalable method.

Atmospheric pressure spatial atomic layer deposition (AP-SALD) was used to deposit n-type ZnO and Zn1-xMgxO thin films onto p-type thermally oxidized Cu2O ...

Chemistry

Integration of Light Trapping Silver Nanostructures in Hydrogenated Microcrystalline Silicon Solar Cells by Transfer Printing

One of the potential applications of metal nanostructures is light trapping in solar cells, where unique optical properties of nanosized metals, commonly known as plasmonic effects, play an important role. Research in this field has, however, been impeded owing to the difficulty of fabricating devices containing the desired functional metal nanostructures. In order to provide a viable strategy to this issue, we herein show a transfer printing-based approach that allows the quick and low-cost integration of designed metal nanostructures with a variety of device architectures, including solar cells. Nanopillar poly(dimethylsiloxane) (PDMS) stamps were fabricated from a commercially available nanohole plastic film as a master mold. On this nanopatterned PDMS stamps, Ag films were deposited, which were then transfer-printed onto block copolymer (binding layer)-coated hydrogenated microcrystalline Si (&#181;c-Si:H) surface to afford ordered Ag nanodisk structures. It was confirmed that the resulting Ag nanodisk-incorporated &#181;c-Si:H solar cells show higher performances compared to a cell without the transfer-printed Ag nanodisks, thanks to plasmonic light trapping effect derived from the Ag nanodisks. Because of the simplicity and versatility, further device application would also be feasible thorough this approach.

A viable transfer printing-based methodology to introduce plasmonic metal nanostructures in solar cells is described. Using nanopillar poly(dimethylsiloxane) stamps, an Ag-based ordered nanodisk array was integrated with standard hydrogenated microcrystalline Si solar cells, which led to improved device performances due to plasmonic light trapping.

One of the potential applications of metal nanostructures is light trapping in solar cells, where unique optical properties of nanosized metals, commonly ...

Printing Fabrication of Bulk Heterojunction Solar Cells and In Situ Morphology Characterization

Polymer-based materials hold promise as low-cost, flexible efficient photovoltaic devices. Most laboratory efforts to achieve high performance devices have used devices prepared by spin coating, a process that is not amenable to large-scale fabrication. This mismatch in device fabrication makes it difficult to translate quantitative results obtained in the laboratory to the commercial level, making optimization difficult. Using a mini-slot die coater, this mismatch can be resolved by translating the commercial process to the laboratory and characterizing the structure formation in the active layer of the device in real time and in situ as films are coated onto a substrate. The evolution of the morphology was characterized under different conditions, allowing us to propose a mechanism by which the structures form and grow. This mini-slot die coater offers a simple, convenient, material efficient route by which the morphology in the active layer can be optimized under industrially relevant conditions. The goal of this protocol is to show experimental details of how a solar cell device is fabricated using a mini-slot die coater and technical details of running in situ structure characterization using the mini-slot die coater.

Printing Fabrication of Bulk Heterojunction Solar Cells and In Situ Morphology Characterization

Here, we present a protocol to fabricate organic thin film solar cells using a mini-slot die coater and related in-line structure characterizations using synchrotron scattering techniques.

Polymer-based materials hold promise as low-cost, flexible efficient photovoltaic devices. Most laboratory efforts to achieve high performance devices ...

Fabrication of Fully Solution Processed Inorganic Nanocrystal Photovoltaic Devices

We demonstrate a method for the preparation of fully solution processed inorganic solar cells from a spin and spray coating deposition of nanocrystal inks. For the photoactive absorber layer, colloidal CdTe and CdSe nanocrystals (3-5 nm) are synthesized using an inert hot injection technique and cleaned with precipitations to remove excess starting reagents. Similarly, gold nanocrystals (3-5 nm) are synthesized under ambient conditions and dissolved in organic solvents. In addition, precursor solutions for transparent conductive indium tin oxide (ITO) films are prepared from solutions of indium and tin salts paired with a reactive oxidizer. Layer-by-layer, these solutions are deposited onto a glass substrate following annealing (200-400 &#176;C) to build the nanocrystal solar cell (glass/ITO/CdSe/CdTe/Au). Pre-annealing ligand exchange is required for CdSe and CdTe nanocrystals where films are dipped in NH4Cl:methanol to replace long-chain native ligands with small inorganic Cl- anions. NH4Cl(s) was found to act as a catalyst for the sintering reaction (as a non-toxic alternative to the conventional CdCl2(s) treatment) leading to grain growth (136&#177;39 nm) during heating. The thickness and roughness of the prepared films are characterized with SEM and optical profilometry. FTIR is used to determine the degree of ligand exchange prior to sintering, and XRD is used to verify the crystallinity and phase of each material. UV/Vis spectra show high visible light transmission through the ITO layer and a red shift in the absorbance of the cadmium chalcogenide nanocrystals after thermal annealing. Current-voltage curves of completed devices are measured under simulated one sun illumination. Small differences in deposition techniques and reagents employed during ligand exchange have been shown to have a profound influence on the device properties. Here, we examine the effects of chemical (sintering and ligand exchange agents) and physical treatments (solution concentration, spray-pressure, annealing time and annealing temperature) on photovoltaic device performance.

This protocol describes the synthesis and solution deposition of inorganic nanocrystals layer by layer to produce thin film electronics on non-conductive surfaces. Solvent-stabilized inks can produce complete photovoltaic devices on glass substrates via spin and spray coating following post-deposition ligand exchange and sintering.

We demonstrate a method for the preparation of fully solution processed inorganic solar cells from a spin and spray coating deposition of nanocrystal ...

Influence of Hybrid Perovskite Fabrication Methods on Film Formation, Electronic Structure, and Solar Cell Performance

Hybrid organic/inorganic halide perovskites have lately been a topic of great interest in the field of solar cell applications, with the potential to achieve device efficiencies exceeding other thin film device technologies. Yet, large variations in device efficiency and basic physical properties are reported. This is due to unintentional variations during film processing, which have not been sufficiently investigated so far. We therefore conducted an extensive study of the morphology and electronic structure of a large number of CH3NH3PbI3 perovskite where we show how the preparation method as well as the mixing ratio of educts methylammonium iodide and lead(II) iodide impact properties like film formation, crystal structure, density of states, energy levels, and ultimately the solar cell performance.

We present an extensive study on the effects of different fabrication methods for organic/inorganic perovskite thin films by comparing crystal structures, density of states, energy levels, and ultimately the solar cell performance.

Hybrid organic/inorganic halide perovskites have lately been a topic of great interest in the field of solar cell applications, with the potential to ...

Well-aligned Vertically Oriented ZnO Nanorod Arrays and their Application in Inverted Small Molecule Solar Cells

This manuscript describes how to design and fabricate efficient inverted solar cells, which are based on a two-dimensional conjugated small molecule (SMPV1) and [6,6]-phenyl-C71-butyric acid methyl ester (PC71BM), by utilizing ZnO nanorods (NRs) grown on a high quality Al-doped ZnO (AZO) seed layer. The inverted SMPV1:PC71BM solar cells with ZnO NRs that grew on both a sputtered and sol-gel processed AZO seed layer are fabricated. Compared with the AZO thin film prepared by the sol-gel method, the sputtered AZO thin film exhibits better crystallization and lower surface roughness, according to X-ray diffraction (XRD) and atomic force microscope (AFM) measurements. The orientation of the ZnO NRs grown on a sputtered AZO seed layer shows better vertical alignment, which is beneficial for the deposition of the subsequent active layer, forming better surface morphologies. Generally, the surface morphology of the active layer mainly dominates the fill factor (FF) of the devices. Consequently, the well-aligned ZnO NRs can be used to improve the carrier collection of the active layer and to increase the FF of the solar cells. Moreover, as an anti-reflection structure, it can also be utilized to enhance the light harvesting of the absorption layer, with the power conversion efficiency (PCE) of solar cells reaching 6.01%, higher than the sol-gel based solar cells with an efficiency of 4.74%.

This manuscript describes how to design and fabricate efficient inverted SMPV1:PC71BM solar cells with ZnO nanorods (NRs) grown on a high quality Al-doped ZnO (AZO) seed layer. The well-aligned vertically oriented ZnO NRs exhibit high crystalline properties. The power conversion efficiency of solar cells can reach 6.01%.

This manuscript describes how to design and fabricate efficient inverted solar cells, which are based on a two-dimensional conjugated small molecule ...

Fabrication of Robust Nanoscale Contact between a Silver Nanowire Electrode and CdS Buffer Layer in Cu(In,Ga)Se2 Thin-film Solar Cells

Silver nanowire transparent electrodes have been employed as window layers for Cu(In,Ga)Se2 thin-film solar cells. Bare silver nanowire electrodes normally result in very poor cell performance. Embedding or sandwiching silver nanowires using moderately conductive transparent materials, such as indium tin oxide or zinc oxide, can improve cell performance. However, the solution-processed matrix layers can cause a significant number of interfacial defects between transparent electrodes and the CdS buffer, which can eventually result in low cell performance. This manuscript describes how to fabricate robust electrical contact between a silver nanowire electrode and the underlying CdS buffer layer in a Cu(In,Ga)Se2 solar cell, enabling high cell performance using matrix-free silver nanowire transparent electrodes. The matrix-free silver nanowire electrode fabricated by our method proves that the charge-carrier collection capability of silver nanowire electrode-based cells is as good as that of standard cells with sputtered ZnO:Al/i-ZnO as long as the silver nanowires and CdS have high-quality electrical contact. The high-quality electrical contact was achieved by depositing an additional CdS layer as thin as 10 nm onto the silver nanowire surface.

Fabrication of Robust Nanoscale Contact between a Silver Nanowire Electrode and CdS Buffer Layer in CuIn,GaSe2 Thin-film Solar Cells

In this protocol, we describe the detailed experimental procedure for the fabrication of a robust nanoscale contact between a silver nanowire network and CdS buffer layer in a CIGS thin-film solar cell.

Silver nanowire transparent electrodes have been employed as window layers for Cu(In,Ga)Se2 thin-film solar cells. Bare silver nanowire electrodes ...

Close-Space Sublimation-Deposited Ultra-Thin CdSeTe/CdTe Solar Cells for Enhanced Short-Circuit Current Density and Photoluminescence

Developments in photovoltaic device architectures are necessary to make solar energy a cost-effective and reliable source of renewable energy amidst growing global energy demands and climate change. Thin film CdTe technology has demonstrated cost-competitiveness and increasing efficiencies due partially to rapid fabrication times, minimal material usage, and introduction of a CdSeTe alloy into a ~3 &#956;m absorber layer. This work presents the close-space sublimation fabrication of thin, 1.5 &#181;m CdSeTe/CdTe bilayer devices using an automated in-line vacuum deposition system. The thin bilayer structure and fabrication technique minimize deposition time, increase device efficiency, and facilitate future thin absorber-based device architecture development. Three fabrication parameters appear to be the most impactful for optimizing thin CdSeTe/CdTe absorber devices: substrate preheat temperature, CdSeTe:CdTe thickness ratio, and CdCl2 passivation. For proper sublimation of the CdSeTe, the substrate temperature prior to deposition must be ~540 &#176;C (higher than that for CdTe) as controlled by dwell time in a preheat source. Variation in the CdSeTe:CdTe thickness ratio reveals a strong dependence of device performance on this ratio. The optimal absorber thicknesses are 0.5 &#956;m CdSeTe/1.0 &#956;m CdTe, and non-optimized thickness ratios reduce efficiency through back-barrier effects. Thin absorbers are sensitive to CdCl2 passivation variation; a much less aggressive CdCl2 treatment (compared to thicker absorbers) regarding both temperature and time yields optimal device performance. With optimized fabrication conditions, CdSeTe/CdTe increases device short-circuit current density and photoluminescence intensity compared to single-absorber CdTe. Additionally, an in-line close-space sublimation vacuum deposition system offers material and time reduction, scalability, and attainability of future ultra-thin absorber architectures.

This work describes the complete fabrication process of thin absorber cadmium selenium telluride/cadmium telluride photovoltaic devices for enhanced efficiency. The process utilizes an automated in-line vacuum system for close-space sublimation deposition that is scalable, from fabrication of small area research devices as well as large-scale modules.

Developments in photovoltaic device architectures are necessary to make solar energy a cost-effective and reliable source of renewable energy amidst ...

Making Record-efficiency SnS Solar Cells by Thermal Evaporation and Atomic Layer Deposition

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